Abstract: Embodiments of solid-state storage system are provided herein include data recovery mechanism to recover data upon detection of a read error (e.g., an uncorrectable ECC error) in a storage element such as a page. In various embodiments, the system is configured to determine optimal reference voltage value(s) by evaluating the reference voltage value(s) of page(s) that are related to the page where the failure occurred. The related page(a) may include a page that is paired with the initial page where the failure occurred (e.g., the paired pages reside in a common memory cell), or a neighboring page that is physically near the page where the initial page, and/or a paired page of the neighboring page. In another embodiment, the system is configured to perform a time-limited search function to attempt to determine optimal reference voltage values through an iterative process that adjusts voltage values in a progression to determine a set of values that can retrieve the data.

Abstract: A disk drive is disclosed that utilizes multi-tiered solid state memory for caching data received from a host. Data can be stored in a memory tier that can provide the required performance at a low cost. For example, multi-level cell (MLC) memory can be used to store data that is frequently read but infrequently written. As another example, single-level cell (SLC) memory can be used to store data that is frequently written. Improved performance, reduced costs, and improved power consumption can thereby be attained.

Abstract: Disclosed herein is a controller architecture that pairs a controller with a NVM (non-volatile memory) storage system over a high-level, high speed interface such as PCIe. In one embodiment, the NVM storage system includes a bridge that communicates with the controller via the high-level interface, and controls the NVM via an interface (e.g., ONFI). The controller is provided a rich set of physical level of controls over individual elements of the NVM. In one embodiment, the controller is implemented in a higher powered processor that supports advanced functions such as mapping, garbage collection, wear leveling, etc. In one embodiment, the bridge is implemented in a lower powered processor and performs basic signal processing, channel management, basic error correction functions, etc. This labor division provides the controller physical control of the NVM over a fast, high-level interface, resulting in the controller managing the NVM at both the page and block level.

Abstract: Embodiments of the invention are directed to improving parity determination in a data redundancy scheme. In a block oriented storage system, where the storage element block size is an integer multiple of the block size used on the host interface, parity can be calculated on clean boundaries of the host block. However, this is not always the case and storage inefficiency occurs as a result. Embodiments of the invention optimize RAID parity calculation in a non-volatile solid state device by allowing the RAID stripe depth (also termed a “strip”) to be a non-integer multiple of the size of the individual storage element, i.e., the non-volatile memory program granularity. This enables efficient use of storage space where the host data size does not match the storage element size of the non-volatile memory while providing a straightforward way of handling parity generation and data recovery.

Abstract: A flash memory device is disclosed comprising a flash controller for accessing a first flash memory over a first channel and a second flash memory over a second channel. A multi-command descriptor block is received from a host, wherein the multi-command descriptor block comprises identifiers for identifying a plurality of access commands that the host is preparing to request. A first group of the access commands are selected to execute concurrently and a second group of the access commands are selected to execute concurrently. The first group of access commands are received from the host and executed concurrently by accessing at least the first and second flash memories concurrently. The second group of access commands are received from the host and executed concurrently by accessing at least the first and second flash memories concurrently.

Abstract: Redundant “parity” RAID (5, 6, 50, 60) is a well-known technique for increasing data reliability beyond the failure rate of an individual storage device. In many implementations of redundant RAID, when a storage element is lost, a replacement or spare element is required to restore redundancy. A typical solid state storage device is over-provisioned with more storage media than is required to satisfy the specified user capacity. Embodiments of the present invention utilize the additional over-provisioned capacity and potentially modify the stripe size to restore RAID redundancy when a storage element or path (i.e., page, block, plane, die, channel, etc.) has failed. In some cases, this may also involve reducing the RAID stripe size.

Abstract: Embodiments of the invention are directed to systems and methods for reducing an amount of backup power needed to provide power fail safe preservation of a data redundancy scheme such as RAID that is implemented in solid state storage devices where new write data is accumulated and written along with parity data. Because new write data cannot be guaranteed to arrive in integer multiples of stripe size, a full stripe's worth of new write data may not exist when power is lost. Various embodiments use truncated RAID stripes (fewer storage elements per stripe) to save cached write data when a power failure occurs. This approach allows the system to maintain RAID parity data protection in a power fail cache flush case even though a full stripe of write data may not exist, thereby reducing the amount of backup power needed to maintain parity protection in the event of power loss.

Abstract: A dual parity hardware architecture that enables data to be read from each sector only once and performs both the P parity and Q parity from the single data source. The Q parity calculator provides parallel processing capabilities so that multiple parity operations are performed on the same sector simultaneously. The dual parity hardware architecture provides flexibility in restoring data, generating parity, and updating parity for differing data sector sizes.

Abstract: A method of managing bad blocks in a RAID storage system. The system restores physical storage media and stripe redundancy by reassigning sectors and creating a bad block tracking structure. The bad block tracking structure consists of a volume map, a redundancy group table, and a bad block table that stores a bad block list. Redundancy is achieved through RAID 1 or RAID 10 mirroring rather than through the parity restoration required by conventional systems. The tracking structure returns media error status data to the originating host on volume read commands. The structure accepts volume write data from the originating host and then deletes the bad block tracking structure.

Abstract: A system for mapping between logical addresses and storage units of a plurality of storage volumes which comprise a storage system. For each volume, logical addresses are mapped to storage units using a volume mapping table. Each volume mapping table is comprised of a plurality of segments. Each segment need not be contiguously allocated to another segment of the same table. Thus, each volume mapping table can be independently expanded or reduced without affecting other volume mapping tables. A hash function, a hash table, a segment table, and a redundancy group descriptor table may also be used to help manage the segments of the volume mapping tables.

Abstract: An I/O controller having separate command and data paths, thereby eliminating the bandwidth used by the commands and thus increasing bandwidth available to the data buses. Additionally, the I/O controller uses multiple dedicated data paths, for example, dedicated distributed buses, and provides increased speed due to improved hardware integration. The I/O controller employs distributed processing methods that decouple the external microprocessor from much of the decision-making, thereby providing improved operating efficiency and thus more useable bandwidth at any given clock frequency. Accordingly, the I/O controller is capable of maximizing I/O operations (IOPS) on all I/O ports by functioning at the rate of I/O connections to hosts and storage elements without becoming a bottleneck.

Abstract: A system for and method of increasing performance and manageability of storage area networks using optimized cache setting and handling policies. Initial cache management policies are set on a volume or zone basis, performance statistics are gathered based on preset statistical criteria, and policies are then set according to the goal of reaching particular system performance goals. Cache performance is optimized by customizing individual cache policies according to the underlying processing needs of each volume or sub-volume within the networked storage system. Cache parameter settings are optimized in a different way depending on whether the bulk of commands processed in the volume or sub-volume are pseudo-sequential or random, as well as other system-specific considerations.

Abstract: A method of predictive baseline volume profile creation for new volumes in a networked storage system and a system for dynamically reevaluating system performance and needs to create an optimized and efficient use of system resources by changing volume profiles as necessary. The system gathers statistical data and analyzes the information through algorithms to arrive at an optimal configuration for volume clusters. Clusters are then reallocated and reassigned to match the ideal system configuration for that point in time. The system continually reevaluates and readjusts its performance to meet throughput requirements specified in the quality of service agreement.

Abstract: A network storage system includes a network storage system controller/virtualizer which includes at least one transaction processor. When a host access request is received by the network storage system controller/virtualizer, the transaction processor calculates one or more cost functions. In one exemplary embodiment, a cost function associated with storage system volume load and a cost function associated with communication path load are calculated. The cost function result(s) are utilized by the storage system controller/virtualizer to form a request for servicing the host access request while balancing the load of the network storage system.

Abstract: A virtualizer module/element and a networked storage controller architecture with a virtualization layer that includes virtualizer modules. The virtualizer modules contain storage controller functionality as well as a cache subsystem. The virtualizer module processes primary data commands received from a host processor to determine if the cache subsystem of the virtualizer can service the data request or if it should be sent to a command mapper to retrieve the data from a downstream storage element. The cache subsystem of the virtualizer module thus enables reduced latency in the networked storage system as well as better management of storage devices and resources. The virtualizer module also facilitates predictive reads and read-ahead operations as well as coalesced write requests to a given storage device in order to increase system performance and storage device longevity.

Abstract: A storage element pending command queue prioritization system using multiple pending queues each assigned to a particular RAID command type. Pending commands from each of the queues are organized in such a way that lower priority commands are guaranteed a fixed amount of storage element bandwidth. Storage element throughput is optimized by limiting higher priority commands to a maximum service level and processing lower priority requests with the added storage element bandwidth, allowing lower priority requests to exceed their minimum service levels.

Abstract: A method of efficiently preventing data loss, specifically a RAID 5 write hole, in data storage system by storing valid parity information at the storage controller level during data write operations. The method employs the use of redundant data structures that hold metadata specific to outstanding writes and parity information. The method uses the redundant data structures to recreate the write commands and data when a system failure occurs before the writes have completed.

Abstract: A transaction processor pipeline architecture and associated apparatus for processing multiple queued transaction requests incorporates multiple processing elements working in parallel. Each processing element is configured to perform a specific function within the transaction processor system. Certain processing elements are assigned as function controllers, which are assigned to process specific transaction request subtask categories and may be augmented with dedicated hardware to accelerate certain subtask functions. Other processing elements are configured as list managers, which are optimized for managing data structure operations in memory. The processing elements are connected by a cross-point interconnect. The transaction processor system is configurable and scalable based on application needs.

Abstract: A virtualizer module/element and a networked storage controller architecture with a virtualization layer that includes virtualizer modules. The virtualizer modules contain storage controller functionality as well as a cache subsystem. The virtualizer module processes primary data commands received from a host processor to determine if the cache subsystem of the virtualizer can service the data request or if it should be sent to a command mapper to retrieve the data from a downstream storage element. The cache subsystem of the virtualizer module thus enables reduced latency in the networked storage system as well as better management of storage devices and resources. The virtualizer module also facilitates predictive reads and read-ahead operations as well as coalesced write requests to a given storage device in order to increase system performance and storage device longevity.

Abstract: A system for and method of increasing performance and manageability of storage area networks using optimized cache setting and handling policies. Initial cache management policies are set on a volume or zone basis, performance statistics are gathered based on preset statistical criteria, and policies are then set according to the goal of reaching particular system performance goals. Cache performance is optimized by customizing individual cache policies according to the underlying processing needs of each volume or sub-volume within the networked storage system. Cache parameter settings are optimized in a different way depending on whether the bulk of commands processed in the volume or sub-volume are pseudo-sequential or random, as well as other system-specific considerations.