Abstract: CMOS imagers can possess higher levels of imager noise than their predecessors, CCDs. This noise can be of the form of temporal variation and fixed pattern. The fixed pattern component of this noise can be removed, which is known already in the art. The invention in this disclosure is that proper correction can be developed for all imager conditions (imager integration time and imager temperature) using a single FPN (fixed pattern noise) dark map, a single FPN PRNU (pixel response nonuniformity) map, imager integration time and imager temperature. Without this invention, a dark frame capture and a flat field capture (integrating sphere), are required before every image capture, a practical impossibility in typical picture taking.

Abstract: A CMOS image sensor comprises a substrate of a first conductivity type, a photodetector for capturing incident light and converting it to a charge; a transfer gate for passing the charge from the photodetector; and a region of the first conductivity type of enhanced conductivity in the substrate which extends substantially along an entire length and width of the transfer gate.

Abstract: A method and structure for a complementary metal oxide semiconductor active pixel sensor device having a photodetector, a sensing node electrically connected to the photodetector, an output connected to the photodetector, and a voltage-independent capacitance device connected between the sensing node and the output. The voltage-independent capacitance device provides a capacitance independently of a voltage on the sensing node. The voltage-independent capacitance device can be a voltage-independent capacitor, an electrode-electrode capacitor, or a common source amplifier and should have a capacitance larger than the capacitance of the sensing node. The voltage-independent capacitance device lowers an overall voltage-dependent capacitance of the APS.

Abstract: An image sensor device comprising a silicon substrate having a plurality of CMOS circuit formed thereon, including a pixel array having a plurality of rows and a plurality of columns, a row addressing circuit operatively connected to each the pixel array and the timing control circuit, the row addressing circuit having a row bus that provides address lines to each row in the pixel array, a column addressing circuit, a pixel timing circuit, a timing control logic block, a signal processing circuit, and an interface circuit coupled to external computational means for provision of address and control signals to the sensor device, the interface circuit being operatively coupled the timing control logic, the pixel timing circuit, the row addressing circuit and the column addressing circuit.

Abstract: A semiconductor based image sensor comprising a plurality of pixels formed upon a major surface of a semiconductor substrate, a majority of the pixels having a photodetector with a plurality of color filters of at least two different colors arranged over a second majority of the pixels a sense node formed within each of the pixels and operatively connected to CMOS control circuitry a plurality of busses arranged such that there is at least one unique bus operatively connected to the pixels for each color and interface means for providing an electrical connection to a timing circuit, the interface means having individual connections to each of the busses and capable of providing the predetermined voltage on the busses at a desired time.

Abstract: A semiconductor based X-Y addressable imager having an imaging array with a plurality of the pixels within the X-Y addressable imager, a photodetector within each of the plurality of pixels configured to sense a first bandwidth of light, a sense node within each of the pixels configured to sense a second bandwidth of light, a reset mechanism operatively configured to the photodetector and the sense node to allow resetting each of the photodetector and the sense node to a predetermined potential, the sense node being formed such that it does not have a light shield allowing the sense node to act as a second photodetector, and a transfer mechanism within each of plurality of pixels configured to transfer charge from the photodetector to the sense node. The X-Y addressable sensor in this embodiment can have either the first and second bandwidths being different, or the first and second bandwidths are the same.

Abstract: A method of minimizing noise in an image produced by an electronic imager comprising: determining a correction system for a range of imager integration times and a range of imager temperatures for an electronic imager which has taken a series of dark capture images and a series of flat field capture images in a calibration mode; and applying the correction system to an image produced by the electronic imager in an image capture mode.

Abstract: CMOS imagers can possess higher levels of imager noise than their predecessors, CCDs. This noise can be of the form of temporal variation and fixed pattern. The fixed pattern component of this noise can be removed, which is known already in the art. The invention in this disclosure is that proper correction can be developed for all imager conditions (imager integration time and imager temperature) using a single FPN (fixed pattern noise) dark map, a single FPN PRNU (pixel response nonuniformity) map, imager integration time and imager temperature. Without this invention, a dark frame capture and a flat field capture (integrating sphere), are required before every image capture, a practical impossibility in typical picture taking.

Abstract: A X-Y addressable MOS imager sensor method and apparatus wherein a semiconductor based MOS sensor having an array of pixels forming the X-Y addressable MOS imager, the X-Y addressable MOS imager having a plurality of the pixels such that each pixel within the plurality of pixels has a photodetector with a reset mechanism that adjusts the photodetector potential to a predetermined potential level employs the measuring a plurality of reset levels with two different elapsed times between reset and measurement of the reset level, a comparison circuit operatively coupled to the means for measuring to determine a difference in reset levels, a predetermined set of transfer functions used to identify effective signal levels of the photodetectors, and determines from the difference which transfer function is applicable to that photodetector range of accumulated light. In response to the difference detected, transfer functions are applied to the charge read out from the photodetector.

Abstract: An image sensor having a plurality of pixels arranged in a series of row and columns comprising a semiconductor substrate having a plurality of pixels formed in rows and columns with at least two pixels that each have a voltage to charge conversion region that are spatially isolated from each other and electrically connected to the source of a single reset transistor. The pixels that share a reset transistor can also share an amplifier, and a select electrical function. The preferred embodiment envisions adjacent pixels, although, immediate adjacency is not a requirement.

Abstract: An X-Y addressable active pixel sensor that uses serial shift registers to select image windows resulting in less semiconductor area being employed compared with prior art address decoding techniques comprising: an X-Y addressable imager having signal lines in both X and Y directions; at least one pair of serial shift registers operatively connected to the X-Y imager such that there is at least one serial shift register in each x and y directions to select signal lines to be applied to the X-Y imager; and loading circuitry that provides the capability for selectively addressing imaging sub-windows by placing bit patterns into the shift registers.

Abstract: The present invention provides a high fill factor Photogate Active Pixel Architecture with the capability to perform Correlated Double Sampling, (CDS). The functionality of a 4 transistor pixel is maintained while eliminating the separate row select transistor. This is done by using the same control signal for the photogates and the Row Select signal. The preferred embodiment of the invention employs a floating diffusion as the charge to voltage conversion node and specifically envisions embodiments wherein the source of the reset transistor is a floating diffusion and the drain of the reset transistor is connected to the photogate control bus.

Abstract: An active pixel sensor having a plurality of pixels with at least one pixel comprising: a photodetector operatively connected to a first electrical node; a pixel signal coupling capacitor having a first side connected to the first electrical node and a second side connected to a second electrical node; a reset transistor having a first source that is connected on the first electrical node and a second source that it connected to the second electrical node; a reset gate on the reset transistor connected to a reset control buss and a drain on the reset transistor connected to a voltage supply buss; an amplifier operatively connected to the second electrical node; and a select transistor operatively coupled to the amplifier. The preferred embodiment of the invention has a gate electrode layer formed over at least a portion of the photodetector and functions also as the gate of the transistor amplifier.

Abstract: An image sensor comprises a plurality of pixels arranged in rows and columns; at least two adjacent pixels in the same row each having a photodetector; a row select mechanism that allows independent selection of the adjacent pixels; and a common output signal node and output signal line for the two adjacent pixels.

Abstract: A complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) having a plurality of pixels which includes at least one pixel entailing a photodetector, a transistor adjacent the photodetector having a silicide surface, and an insulator over the photodetector. The insulator has a thickness sufficient to prevent the silicide surface from forming over the photodetector and contains an insulator as a field oxide.

Abstract: A X-Y addressable MOS imager sensor method and apparatus wherein a semiconductor based MOS sensor having an array of pixels forming the X-Y addressable MOS imager, the X-Y addressable MOS imager having a plurality of the pixels such that each pixel within the plurality of pixels has a photodetector with a reset mechanism that adjusts the photodetector potential to a predetermined potential level employs the measuring a plurality of reset levels with two different elapsed times between reset and measurement of the reset level, a comparison circuit operatively coupled to the means for measuring to determine a difference in reset levels, a predetermined set of transfer functions used to identify effective signal levels of the photodetectors, and determines from the difference which transfer function is applicable to that photodetector range of accumulated light. In response to the difference detected, transfer functions are applied to the charge read out from the photodetector.

Abstract: A complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) having a plurality of pixels which includes at least one pixel entailing a photodetector, a transistor adjacent the photodetector having a silicide surface, and an insulator over the photodetector. The insulator has a thickness sufficient to prevent the silicide surface from forming over the photodetector and contains an insulator as a field oxide.

Abstract: A semiconductor based image sensor comprising a plurality of pixels formed upon a major surface of a semiconductor substrate, a majority of the pixels having a photodetector with a plurality of color filters of at least two different colors arranged over a second majority of the pixels a sense node formed within each of the pixels and operatively connected to CMOS control circuitry a plurality of busses arranged such that there is at least one unique bus operatively connected to the pixels for each color and interface means for providing an electrical connection to a timing circuit, the interface means having individual connections to each of the busses and capable of providing the predetermined voltage on the busses at a desired time.

Abstract: A X-Y addressable MOS imager sensor method and apparatus wherein a semiconductor based MOS sensor having an array of pixels forming the X-Y addressable MOS imager, the X-Y addressable MOS imager having a plurality of the pixels such that each pixel within the plurality of pixels has a photodetector with a reset mechanism that adjusts the photodetector potential to a predetermined potential level employs the measuring a plurality of reset levels with two different elapsed times between reset and measurement of the reset level, a comparison circuit operatively coupled to the means for measuring to determine a difference in reset levels, a predetermined set of transfer functions used to identify effective signal levels of the photodetectors, and determines from the difference which transfer function is applicable to that photodetector range of accumulated light. In response to the difference detected, transfer functions are applied to the charge read out from the photodetector.

Abstract: An Active Pixel Sensor with increased sensitivity by employing an improved buss structure reducing the number of signal lines used within the sensor and approaching the sensitivity of a CCD device while still retaining the advantages of an APS device. Fill factor and sensitivity of an APS device is increased by sharing signal busses between rows that are currently being read out and those that are to be read out next. This eliminates the need for a separate signal line contact area in each pixel, and uses the timing signal and buss for one row as another timing signal and buss for the next row.