Patents by Inventor Robert T. George

Robert T. George has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Maintaining processor resources during architectural events
    Patent number: 10740249
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: August 11, 2020
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20190324920
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: May 2, 2019
    Publication date: October 24, 2019
    Applicant: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 10303620
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20180357179
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 13, 2018
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 9996475
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: June 12, 2018
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20170235678
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: November 29, 2016
    Publication date: August 17, 2017
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 9507730
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: November 29, 2016
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20160011986
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: September 18, 2015
    Publication date: January 14, 2016
    Applicant: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 9164901
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 20, 2015
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 9164918
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: October 20, 2015
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 9152561
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 6, 2015
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20150227470
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: December 23, 2014
    Publication date: August 13, 2015
    Applicant: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 9086958
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 21, 2015
    Assignee: Intel Corporation
    Inventors: Jason W. Brandit, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20150113199
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 23, 2015
    Applicant: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20150113200
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 23, 2015
    Applicant: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural evens
    Patent number: 8806172
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 12, 2014
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • Maintaining processor resources during architectural events
    Patent number: 8788790
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: July 22, 2014
    Assignee: Intel Corporation
    Inventors: Jason W Brandt, Sanjoy K Mondal, Richard A Uhlig, Gilbert Neiger, Robert T George
  • Maintaining processor resources during architectural events
    Patent number: 8543793
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: September 24, 2013
    Assignee: Intel Corporation
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENS
    Publication number: 20130232316
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 5, 2013
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George
  • MAINTAINING PROCESSOR RESOURCES DURING ARCHITECTURAL EVENTS
    Publication number: 20130212314
    Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 15, 2013
    Inventors: Jason W. Brandt, Sanjoy K. Mondal, Richard A. Uhlig, Gilbert Neiger, Robert T. George