Patents by Inventor Robert Van Veldhoven

Robert Van Veldhoven has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170139016
    Abstract: A magnetic field sensor is disclosed for providing an output signal in response to an external magnetic field. The sensor comprises a primary magnetic field transducer for producing a primary signal in response to the external magnetic field and having a first magnetic field saturation characteristic; a secondary magnetic field transducer for producing a secondary signal in response to the external magnetic field and having a second magnetic field saturation characteristic. The first magnetic field saturation characteristic is different from the second magnetic field saturation characteristic. The sensor is configured to use the secondary signal to correct for errors in the output signal arising from saturation of the primary transducer.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 18, 2017
    Inventors: Klaus Reimann, Robert van Veldhoven, Jaap Ruigrok, Selcuk Ersoy, Ralf van Otten, Jörg Kock
  • Publication number: 20160341800
    Abstract: It is described a sensor system (100, 200, 300) comprising (a) a first sensor path (110) comprising a first sensing element (111) and a second sensing element (112) being connected in series between a first supply terminal (st1) and a second supply terminal (st2) and an intermediate node (in, in1) being provided in between the first supply terminal (st1) and the second supply terminal (st2), (b) a second sensor path (120) comprising (b1) a third sensing element (123) and a fourth sensing element (124) being connected in series between the first supply terminal (st1) and the second supply terminal (st2), wherein the third sensing element (123) is subdivided into a first third subcomponent (R3a) and a second third subcomponent (R3b) and the fourth sensing element (124) is subdivided into a first fourth subcomponent (R4a) and a second fourth subcomponent (R4b), (b2) a first reference node (rn1) being provided in between the first supply terminal (st1) and the second supply terminal (st2), and (b3) a second refer
    Type: Application
    Filed: May 19, 2015
    Publication date: November 24, 2016
    Inventors: Edwin SCHAPENDONK, Pieter VAN DER ZEE, Fabio SEBASTIANO, Robert VAN VELDHOVEN
  • Patent number: 8736473
    Abstract: A low power, high dynamic range sigma-delta modulator comprises a quantizer followed by a digital integrator for generating an integrated digital signal from a quantized signal. The output of the digital integrator is coupled to a digital-to-analog converter in the feedback loop of the sigma-delta modulator.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: May 27, 2014
    Assignee: NXP, B.V.
    Inventors: Carel Dijkmans, Robert van Veldhoven, Ben Kup, Leon van der Dussen, Harry Neuteboom
  • Publication number: 20120038500
    Abstract: A low power, high dynamic range sigma-delta modulator comprises a quantizer followed by a digital integrator for generating an integrated digital signal from a quantized signal. The output of the digital integrator is coupled to a digital-to-analog converter in the feedback loop of the sigma-delta modulator.
    Type: Application
    Filed: August 16, 2010
    Publication date: February 16, 2012
    Applicant: NXP B.V.
    Inventors: Carel Dijkmans, Robert Van Veldhoven, Ben Kup, Leon Van Der Dussen, Harry Neuteboom
  • Patent number: 7557741
    Abstract: A device is for digitally processing an input signal that is susceptible to variations in signal strength. The signal (48) is analog to digital converted into a bitstream signal (47), the bitstream signal representing the input signal by consecutive digital values. The device has a signal strength detection circuit (32) for generating a control signal indicative for an overload condition in which the signal strength exceeds a input range of the analog to digital converter, e.g. a sigma-delta modulator. The signal strength detection circuit detects, in the bitstream signal, a sequence (49,50) of adjacent and equal digital values, the sequence having at least a predetermined length. The circuit detects the overload condition effectively and fast, avoiding the delay of signal strength detection in a digital processor.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: July 7, 2009
    Assignee: NXP B.V.
    Inventor: Robert Van Veldhoven