Patents by Inventor Robert W. Pasco

Robert W. Pasco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090033337
    Abstract: A testing substrate comprises internal circuitry connected to external contacts by wiring and meltable conductors are connected to the external contacts of the testing substrate. An interposer having substrate contacts on a first side is connected to the meltable conductors. The interposer is maintained apart from the testing substrate by the meltable conductors. The interposer comprises chip contacts on a second side opposite the first side. The chip contacts are adapted to temporarily connect to an integrated circuit chip being tested and burned-in. The chip contacts can have a different spacing than the substrate contacts. The interposer also includes conductive vias running from the first side to the second side and directly connecting the substrate contacts to the chip contacts.
    Type: Application
    Filed: August 3, 2007
    Publication date: February 5, 2009
    Inventor: Robert W. Pasco
  • Patent number: 6745932
    Abstract: A method and structure for a chip detach apparatus and method that limits the solder ball maximum shear rate and, more particularly, that delays the application of shear force until a minimum predefined temperature is reached. The chip detach apparatus and method can be applied to chips with high solder ball counts, chips with small solder ball sizes, and chips with weak surface strength. The chip detach apparatus and method measures and accounts for variability in the electronic module manufacturing and assembly.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: June 8, 2004
    Assignee: International Business Machines Corp.
    Inventors: Raschid J. Bezama, Govindarajan Natarajan, Robert W. Pasco
  • Patent number: 6726984
    Abstract: The present invention relates generally to a new ceramic structure and process thereof. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-layer ceramic products using very thin green sheets and/or green sheets with very dense electrically conductive patterns on top of a stronger support sheet. The structure and method of the present invention enables the screening, stacking and handling of very thin green sheets and/or green sheets with very dense metallized patterns in the manufacture of multi-layer ceramic packages. The thin green sheets were tacked/bonded to thicker and stronger support sheets to form a sub-structure which had excellent stability in screening and enabled further processing. The sheets are anchored or pinned in such a way as to allow the processing of the green sheet with the subsequent easy removal of the support sheet.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, John U. Knickerbocker, Robert W. Pasco
  • Publication number: 20040041012
    Abstract: A method and structure for a chip detach apparatus and method that limits the solder ball maximum shear rate and, more particularly, that delays the application of shear force until a minimum predefined temperature is reached. The chip detach apparatus and method can be applied to chips with high solder ball counts, chips with small solder ball sizes, and chips with weak surface strength. The chip detach apparatus and method measures and accounts for variability in the electronic module manufacturing and assembly.
    Type: Application
    Filed: September 3, 2002
    Publication date: March 4, 2004
    Applicant: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Govindarajan Natarajan, Robert W. Pasco
  • Publication number: 20030203169
    Abstract: The present invention relates generally to a new ceramic structure and process thereof. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-layer ceramic products using very thin green sheets and/or green sheets with very dense electrically conductive patterns on top of a stronger support sheet. The structure and method of the present invention enables the screening, stacking and handling of very thin green sheets and/or green sheets with very dense metallized patterns in the manufacture of multi-layer ceramic packages. The thin green sheets were tacked/bonded to thicker and stronger support sheets to form a sub-structure which had excellent stability in screening and enabled further processing. The sheets are anchored or pinned in such a way as to allow the processing of the green sheet with the subsequent easy removal of the support sheet.
    Type: Application
    Filed: March 28, 2003
    Publication date: October 30, 2003
    Inventors: Govindarajan Natarajan, John U. Knickerbocker, Robert W. Pasco
  • Patent number: 6607780
    Abstract: The present invention relates generally to a new ceramic structure and process thereof. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-layer ceramic products using very thin green sheets and/or green sheets with very dense electrically conductive patterns on top of a stronger support sheet. The structure and method of the present invention enables the screening, stacking and handling of very thin green sheets and/or green sheets with very dense metallized patterns in the manufacture of multi-layer ceramic packages. The thin green sheets were tacked/bonded to thicker and stronger support sheets to form a sub-structure which had excellent stability in screening and enabled further processing. The sheets are anchored or pinned in such a way as to allow the processing of the green sheet with the subsequent easy removal of the support sheet.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: August 19, 2003
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, John U. Knickerbocker, Robert W. Pasco
  • Publication number: 20030104687
    Abstract: A temporary chip attach (TCA) structure is made with two layers of thin films. The first layer contains capture pads to capture the positional error of the underlying chip carrier vias. The second layer contains smaller TCA pads of exposed metal which are accurately aligned to the grid of the chip BLM, as well as appropriate alignment features for use by a chip automatic placement tool.
    Type: Application
    Filed: December 4, 2001
    Publication date: June 5, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Enrique C. Abreu, Rmar M. Ahmad, Gregory M. Johnson, Robert W. Pasco, Chase R. Perry, Brenda Peterson
  • Patent number: 6562169
    Abstract: A method of processing greensheets, wherein the following steps are performed: a) providing a greensheet having a width, length, thickness, a first side and a second side; b) bonding to the first side of the greensheet at least one strip, wherein the strip lies in a first plane; c) bonding to the second side of the green sheet at least one strip, wherein the strip lies in a second plane; d) processing the greensheet; and e) removing the strips from the processed greensheet.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: May 13, 2003
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Raschid J. Bezama, Jon A. Casey, Amy C. Flack, Robert W. Pasco, Arnold W. Terpening, Renee L. Weisman
  • Patent number: 6509687
    Abstract: The present invention relates generally to a new electrode forming metal/magnetic-ceramic laminate with through-holes and process thereof. More particularly, the invention encompasses a new process for fabrication of a large area ceramic laminate magnet with a significant number of holes, integrated metal plate(s) and co-sintered electrodes for electron and electron beam control. The present invention also relates to a magnetic matrix display (MMD), and electron beam source, and methods of manufacture thereof.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: January 21, 2003
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Raschid J. Bezama, John U. Knickerbocker, Robert W. Pasco
  • Patent number: 6459039
    Abstract: An electronic package assembly for electrical interconnection between two electronic modules having differing conductive array parameters is disclosed. The electronic package assembly includes two electronic modules, providing between the two electronic modules an interposer having a top surface and a bottom surface; a first set of conductive arrays having a first conductive array parameter on the top surface, and a second set of conductive arrays having a second conductive array parameter on the bottom surface, the second conductive array and the first conductive array having differing parameters.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: October 1, 2002
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Govindarajan Natarajan, Robert W. Pasco
  • Patent number: 6423174
    Abstract: The present invention relates generally to a new apparatus and method for forming cavities in semiconductor substrates without the necessity of using an insert. More particularly, the invention encompasses an apparatus and a method for fabricating cavities in semiconductor substrates wherein a coated membrane sheet is placed over the cavity prior to lamination and caused to conform to the contour of the cavity, thus preventing collapse of, or damage to, the cavity shelves during the lamination process. After the lamination process, the coated membrane is conveniently removed without causing damage to the cavity shelves or paste pull-outs.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: July 23, 2002
    Assignee: International Business Machines Corporation
    Inventors: Jon A. Casey, Govindarajan Natarajan, Robert W. Pasco, Vincent P. Peterson
  • Publication number: 20020092600
    Abstract: A method of processing greensheets, wherein the following steps are performed:
    Type: Application
    Filed: January 17, 2001
    Publication date: July 18, 2002
    Applicant: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Raschid J. Bezama, Jon A. Casey, Amy C. Flack, Robert W. Pasco, Arnold W. Terpening, Renee L. Weisman
  • Patent number: 6395337
    Abstract: A multilayer ceramic substrate contains a ceramic coating which is different in composition than the main body of the multilayer ceramic substrate to control camber of the multilayer ceramic substrate during sintering. The primary component of the ceramic coating is a secondary component of the main body of the multilayer ceramic substrate.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: May 28, 2002
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Govindarajan Natarajan, Robert W. Pasco
  • Patent number: 6332782
    Abstract: An interconnect substrate structure for electrical interconnection between two electronic modules having differing conductive array parameters. The interconnect structure comprises an interposer having a top surface and a bottom surface; a first set of conductive arrays having a first conductive array parameter on the top surface, and a second set of conductive arrays having a second conductive array parameter on the bottom surface, the second conductive array and the first conductive array having differing parameters. A plurality of conductors traverses a thickness of the interposer, with the conductors comprising a conductive material optionally coated with a dielectric material, the conductors having a first end at the first conductive arrays and a second end at the second conductive arrays, whereby the conductors connecting the first and second conductive arrays therein are adapted to spatially transform the differing parameters to provide an electrical interconnection.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Govindarajan Natarajan, Robert W. Pasco
  • Patent number: 6319554
    Abstract: The present invention relates generally to a CVD (Chemical Vapor Deposition) process where at least one source metal, such as, nickel (Ni) or alloys thereof, for example, Ni/Cu, Ni/Co, are deposited on metal surfaces which are capable of receiving the source metal, such as, refractory metal, for example, molybdenum, tungsten or alloys thereof, using at least one gaseous Iodide source, such as, an iodic fluid, for example, hydriodic acid gas. The source metal is securely held in place by at least one high strength inert material.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: November 20, 2001
    Assignee: International Business Machine Corporation
    Inventors: Govindarajan Natarajan, Robert W. Pasco
  • Patent number: 6319829
    Abstract: A semiconductor chip interposer increases fatigue life of interconnections between a first component having a relatively high thermal coefficient of expansion (TCE) and a second component having a relatively low TCE. The semiconductor chip interposer includes a thin metal plate having a plurality of through holes, the thin metal plate having a TCE intermediate the relatively high TCE and the relatively low TCE. An insulation coating on the thin metal plate is also included on walls of the through holes. An electrical conductive material fills each of the insulated through holes for electrical interconnection between the first component and the second component.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: November 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Robert W. Pasco, Srinivasa S. N. Reddy, Rao V. Vallabhaneni
  • Patent number: 5882455
    Abstract: Disclosed is an apparatus for laminating a plurality of ceramic greensheets which includes a frame, a bottom plate at one end of the frame, a punch at a second end of the frame, and a non-metallic pad within the frame and between the bottom plate and punch. In operation, a plurality of ceramic greensheets are placed within the frame, the non-metallic pad is placed underneath of, or on top of, the plurality of ceramic greensheets, and pressure is applied to the non-metallic pad and the plurality of ceramic greensheets wherein the non-metallic pad causes the lamination pressure to be uniformly distributed across the plurality of ceramic greensheets. Also disclosed is a method for laminating a plurality of ceramic greensheets using the non-metallic pad.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: March 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Raschid J. Bezama, Govindarajan Natarajan, Robert W. Pasco
  • Patent number: 5788808
    Abstract: The present invention relates generally to a new apparatus and method for forming cavities in semiconductor substrates without the necessity of using an insert. More particularly, the invention encompasses an apparatus and a method for fabricating cavities in semiconductor substrates wherein a cured thick compressible elastic pad is placed over the cavity prior to lamination and caused to conform to the contour of the cavity, thus preventing collapse of, or damage to, the cavity shelves or corners during the lamination process. After the lamination process, the cured thick compressible elastic pad is conveniently removed from the cavity area without causing any damage to the cavity shelves or corners or having any paste pull-outs. This pad can be reused multiple number of times to form these MLC cavity substrates.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: August 4, 1998
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Robert W. Pasco, Charles H. Perry, Vincent P. Peterson
  • Patent number: 5759320
    Abstract: The present invention relates generally to a new apparatus and method for forming cavities in semiconductor substrates without the necessity of using an insert. More particularly, the invention encompasses an apparatus and a method for fabricating cavities in semiconductor substrates wherein a cured thick compressible elastic pad is placed over the cavity prior to lamination and caused to conform to the contour of the cavity, thus preventing collapse of, or damage to, the cavity shelves or corners during the lamination process. After the lamination process, the cured thick compressible elastic pad is conveniently removed from the cavity area without causing any damage to the cavity shelves or corners or having any paste pull-outs. This pad can be reused multiple number of times to form these MLC cavity substrates.
    Type: Grant
    Filed: April 13, 1997
    Date of Patent: June 2, 1998
    Assignee: International Business Machines Corporation
    Inventors: Govindarajan Natarajan, Robert W. Pasco, Charles H. Perry, Vincent P. Peterson
  • Patent number: 5315749
    Abstract: A method of holding utilizing a fixture with five discrete vacuum elements provides support at four peripheral points on a substrate and at the substrate center. Two peripheral vacuum elements are fixed in position on a rigid frame. The remaining peripheral elements and the center element are fixed to a gimbal disc. This gimbal disc is mounted on the frame in such a way that it has three degrees of rotational movement relative to the frame. Downward pressure of a substrate resting on the two fixed elements, brings all three gimbal disc mounted supports into contact with the substrate, without allowing or causing deflection of the substrate. The mounting is locked, and vacuum is applied to all the elements to secure the substrate in place for the planarizing operation.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: May 31, 1994
    Assignee: International Business Machines Corporation
    Inventors: Anton Nenadic, Kenneth Furman, Robert W. Pasco