Patents by Inventor Robert Walker

Robert Walker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260179458
    Abstract: A system includes a processor circuit and a memory comprising machine-readable instructions that, when executed by the processor circuit, cause the processor circuit to provide a tournament venue for a wagering game tournament to be played, and receive multiple tournament entries from multiple players for the wagering game tournament. For ones of the multiple of tournament entries, operations include receiving a tournament initiation instruction from one of the players at a video lottery tournament (VLT) gaming device, receive VLT game data for a base wagering game from the VLT gaming device during the wagering game tournament, determine a tournament score for the players in the tournament venue based on play data and a tournament parameter, evaluate multiple scores for the of players, and award a tournament prize to a player of the players based on an evaluation of the tournament scores corresponding to the wagering game tournament.
    Type: Application
    Filed: December 19, 2024
    Publication date: June 25, 2026
    Applicant: IGT
    Inventors: Robert WALKER, Todd GRIMM, Karen VAN NIEKERK
  • Publication number: 20260170923
    Abstract: Systems and methods that, responsive to an amount of a credit meter of a video lottery terminal being less than a designated amount and an occurrence of a credit meter contribution event, cause the video lottery terminal to reduce the amount of the credit meter, and modify, based on at least part of the reduced amount of the credit meter, an amount of a contribution pool maintained independent of the video lottery terminal. A probability of winning the amount of the contribution pool associated with the occurrence of the credit meter contribution event is independent of the reduced amount of the credit meter.
    Type: Application
    Filed: December 13, 2024
    Publication date: June 18, 2026
    Inventors: Robert Walker, Bradley Boudreau
  • Publication number: 20260170920
    Abstract: Systems and methods that, responsive to an on-demand occurrence of a contribution event associated with a user selected amount at a video lottery terminal, communicate data that causes the video lottery terminal to reduce an amount of a credit meter by the user selected amount, and modify, based on at least part of the reduced amount of the credit meter, an amount of a contribution pool maintained independent of the video lottery terminal. The amount of the contribution pool is won independent of any displayed event occurring in any displayed play of any game at any video lottery terminal and a probability of winning the amount of the contribution pool associated with the occurrence of the credit meter contribution event is independent of the reduced amount of the credit meter.
    Type: Application
    Filed: December 13, 2024
    Publication date: June 18, 2026
    Inventors: Robert Walker, Bradley Boudreau
  • Patent number: 12656543
    Abstract: T-phase-shifted fiber Bragg gratings in optical waveguides, and methods of formation thereof. Sensing apparatus comprising such gratings using femtosecond pulse duration lasers and specialized transmission diffraction elements or phase masks.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: June 16, 2026
    Assignee: NATIONAL RESEARCH COUNCIL OF CANADA
    Inventors: Cyril Hnatovsky, Dan Grobnic, Stephen Mihailov, Robert Walker, Ping Lu, Huimin Ding, David Coulas, Kasthuri De Silva
  • Publication number: 20260148610
    Abstract: A gaming device includes a display device, an input device, a processor circuit, and a memory. The memory includes machine-readable instructions that, when executed by the processor circuit, cause the processor circuit to receive, by the processor circuit and via an operator processing circuit, identification corresponding to multiple game sets. Each of the game sets may include a subset of games. The processor circuit is caused to determine a recommended game set switch from a first game set to a second game set. The first and second game sets are on an electronic gaming machine (EGM) and the determining is performed using artificial intelligence that uses external data to identify the second game sets. The processor circuit is caused to transmit, to the EGM, an identification of the recommended game set switch.
    Type: Application
    Filed: January 20, 2026
    Publication date: May 28, 2026
    Applicant: IGT
    Inventors: Robert WALKER, Dwayne NELSON, Bradley BOUDREAU
  • Patent number: 12613798
    Abstract: Systems and methods for computer memory management by a memory coordinator and a plurality of memory consumers. An urgency and memory quota of each memory consumer is initialized by the memory coordinator, which then adjusts the memory quota of each memory consumer such that the sum of the memory quota of each memory consumer does not exceed a finite amount of computer memory. Each memory consumer adjusts its memory usage in response to the quota input and urgency input from the memory coordinator.
    Type: Grant
    Filed: August 6, 2024
    Date of Patent: April 28, 2026
    Assignee: Kinaxis Inc.
    Inventors: Angela Lin, Robert Walker, Marin Creanga, Dylan Ellicott, Alex Fitzpatrick
  • Patent number: 12613372
    Abstract: A method and apparatus for inscribing a high-temperature stable Bragg grating in an optical waveguide, comprising the steps of: providing the optical waveguide; providing electromagnetic radiation from an ultrashort pulse duration laser, wherein the wavelength of the electromagnetic radiation has a characteristic wavelength in the wavelength range from 150 nanometers (nm) to 2.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: April 28, 2026
    Assignee: NATIONAL RESEARCH COUNCIL OF CANADA
    Inventors: Cyril Hnatovsky, Nurmemet Abdukerim, Dan Grobnic, Robert Walker, Stephen Mihailov, Ping Lu, Huimin Ding, David Coulas, Kasthuri De Silva
  • Patent number: 12613659
    Abstract: Commands in a command queue are received and scheduled. For each of the commands, scheduling includes determining an age of a command based on an entrance time of the command in the command queue. When the age of the command satisfies a first threshold, marking all other commands in the command queue as not issuable when the command is a deterministic command, and marking all other commands in the command queue as not issuable when the command is a non-deterministic command and the intermediate command queue is not empty. Scheduling the command further includes determining whether the command is a read command and marking the command as not issuable when the command is a non-deterministic read command and the intermediate command queue is empty.
    Type: Grant
    Filed: March 25, 2024
    Date of Patent: April 28, 2026
    Inventors: Patrick A. La Fratta, Robert Walker
  • Patent number: 12608349
    Abstract: Embodiments of the present disclosure are directed to maintaining a self-versioning data lake. According to one embodiment, a method for providing access to a data lake can comprise maintaining a corpus of data in an initial version the data lake, monitoring versioning information for each of a plurality of schemas for data submitted to the data lake, and detecting a change in a schema of the plurality of schemas based on the monitoring of the versioning information for the plurality of schema. A new version of the data lake can be created based on the detected changes in the schema while maintaining the initial version of the data lake. A notification of availability of the new version of the data lake can be provided to users of the data lake.
    Type: Grant
    Filed: March 18, 2025
    Date of Patent: April 21, 2026
    Assignee: IGT
    Inventors: Robert Walker, Bradley Boudreau, Yves Légère
  • Patent number: 12596613
    Abstract: A system may include a memory and memory controller configured to communicate with the memory over two or more channels. The memory controller may have a buffer with buffer locations distributed across memory channels, and may be configured to receive a write command for writing current data to a memory location within the memory and may be configured to determine whether to buffer data and/or parity, and configured to write the current data or the current parity in the buffer when it is determined to be stored in the buffer. As the buffer is faster and uses less power, the reduction in back-end accesses improves performance and reduces power consumption.
    Type: Grant
    Filed: July 26, 2024
    Date of Patent: April 7, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Paul Rosenfeld, Robert Walker, Cagdas Dirik
  • Patent number: 12548403
    Abstract: A gaming device includes a display device, an input device, a processor circuit, and a memory. The memory includes machine-readable instructions that, when executed by the processor circuit, cause the processor circuit to receive, by the processor circuit and via an operator processing circuit, identification corresponding to multiple game sets. Each of the game sets may include a subset of games. The processor circuit is caused to determine a recommended game set switch from a first game set to a second game set. The first and second game sets are on an electronic gaming machine (EGM) and the determining is performed using artificial intelligence that uses external data to identify the second game sets. The processor circuit is caused to transmit, to the EGM, an identification of the recommended game set switch.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: February 10, 2026
    Assignee: IGT
    Inventors: Robert Walker, Dwayne Nelson, Bradley Boudreau
  • Publication number: 20260030105
    Abstract: A system may include a memory and memory controller configured to communicate with the memory over two or more channels. The memory controller may have a buffer with buffer locations distributed across memory channels, and may be configured to receive a write command for writing current data to a memory location within the memory and may be configured to determine whether to buffer data and/or parity, and configured to write the current data or the current parity in the buffer when it is determined to be stored in the buffer. As the buffer is faster and uses less power, the reduction in back-end accesses improves performance and reduces power consumption.
    Type: Application
    Filed: July 26, 2024
    Publication date: January 29, 2026
    Inventors: Paul Rosenfeld, Robert Walker, Cagdas Dirik
  • Publication number: 20250378864
    Abstract: Systems and methods for finite time counting period counting of infinite data streams is presented. In particular example systems and methods enable counting row accesses to a memory media device over predetermined time intervals in order to deterministically detect row hammer attacks on the memory media device. Example embodiments use two identical tables that are reset at times offset in relation to each other in a ping-pong manner in order to ensure that there exists no false negative detections. The counting techniques described in this disclosure can be used in various types of row hammer mitigation techniques and can be implemented in content addressable memory or another type of memory. The mitigation may be implemented on a per-bank basis, per-channel basis or per-memory media device basis. The memory media device may be a dynamic random access memory type device.
    Type: Application
    Filed: January 7, 2025
    Publication date: December 11, 2025
    Applicant: Micron Technology, Inc.
    Inventors: Edmund GIESKE, Amitava MAJUMDAR, Cagdas DIRIK, Sujeet AYYAPUREDDI, Yang LU, Ameen D. AKEL, Danilo CARACCIO, Niccolo' IZZO, Elliott C. COOPER-BALIS, Markus H. GEIGER, Robert Walker
  • Patent number: 12450041
    Abstract: Systems and methods that provide a mechanism to transition static schema to dynamic schema while maintaining backwards capability. Simple removal of static schema elements, followed by replacement with dynamic schema elements, make a third-party code incompatible since the third-party code references schema entities that no longer exist. Provided is a mechanism to decrease the memory use of non-material static schema entities. Transitioning static schema to dynamic schema allows the database to avoid loading non-material schema entities, thereby decreasing overall memory usage.
    Type: Grant
    Filed: November 23, 2023
    Date of Patent: October 21, 2025
    Assignee: Kinaxis Inc.
    Inventors: Marin Creanga, Dylan Ellicott, Robert Walker
  • Publication number: 20250322727
    Abstract: A tournament time period is determined for a wagering game tournament, and a plurality of tournament entries are received from a plurality of players during the tournament time period. For each tournament entry, a tournament initiation instruction is received from the player playing a base wagering game at a gaming device, game play data for the base wagering game is received from the gaming device during the tournament time period, and a tournament score for the player is determined based on the play data and a tournament parameter. After the tournament time period, the plurality tournament scores for the plurality of players are evaluated, and a tournament prize is awarded to a player of the plurality of players based on the evaluation of the tournament scores.
    Type: Application
    Filed: April 9, 2025
    Publication date: October 16, 2025
    Applicant: IGT
    Inventors: Mark POLTAROWICZ, Robert WALKER, Theodore STROUT, Bradley BOUDREAU
  • Publication number: 20250284050
    Abstract: A method and apparatus for inscribing a Bragg grating in the core of an optical waveguide. Electromagnetic radiation at a chosen wavelength passes through a diffractive optical element optimized for the wavelength such that a beam is generated on the waveguide having an interference pattern so as to form a Bragg grating in the core of the optical waveguide, the beam being sufficiently intense to cause a permanent (Type II) change in the index of refraction in the core in the form of at least one elongated micropore. The Bragg grating period can be selected to promote coupling of guided light into a radiation mode for detection by a detector to form a spectrometer. The Bragg grating is characterized by a scattering loss less than 10?5 dB per grating period at the Bragg resonance but outcoupling efficiency at visible wavelengths of 0.03% per grating period.
    Type: Application
    Filed: May 23, 2025
    Publication date: September 11, 2025
    Inventors: Abdullah RAHNAMA, Cyril HNATOVSKY, Rune LAUSTEN, Stephen MIHAILOV, Ping LU, Huimin DING, Robert WALKER, Kasthuri DE SILVA, Kasthuri
  • Publication number: 20250265219
    Abstract: A variety of applications can include memory or memory sub-systems having a memory-centric protocol with dedicated unidirectional serialized interfaces in the two directions of the interface for the memory or the memory sub-systems. The unidirectional serialized interfaces can be realized by dedicated pins on the devices connected by the devices. The memory-centric protocol with dedicated unidirectional serialized interfaces can support both deterministic and non-deterministic timed input/output to media and memory sub-systems.
    Type: Application
    Filed: February 14, 2025
    Publication date: August 21, 2025
    Inventors: Dhawal Bavishi, Robert Walker
  • Patent number: D1095557
    Type: Grant
    Filed: August 8, 2023
    Date of Patent: September 30, 2025
    Assignee: IGT
    Inventors: Andrew Le Blanc, Robert Walker
  • Patent number: D1112330
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: February 10, 2026
    Assignee: IGT
    Inventors: Robert Walker, Andrew Le Blanc
  • Patent number: D1134380
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: July 14, 2026
    Assignee: IGT
    Inventors: Robert Walker, Andrew Le Blanc