Patents by Inventor Roberto Gariboldi

Roberto Gariboldi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10910831
    Abstract: A monitoring system is described, to monitor the condition of an industrial wiring system provided with a multipolar electric cable with a number of electric conductors having a power and/or data transmission function and enclosed inside a protective sheath, wherein: monitoring conductors, to monitor wear of the electric cable, are arranged inside the protective sheath electrically insulated from the electric conductors; and a monitoring device is operatively coupled to the monitoring conductors so as to detect at least one electric parameter associated with the monitoring conductors to detect the wear of the electric cable and generate corresponding monitoring data. The monitoring device obtains its own power supply from, and/or transmits the monitoring data by means of, the electric conductors of the same electric cable.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: February 2, 2021
    Inventors: Roberto Gariboldi, Davide Bentivoglio
  • Publication number: 20180337530
    Abstract: A monitoring system is described, to monitor the condition of an industrial wiring system provided with a multipolar electric cable with a number of electric conductors having a power and/or data transmission function and enclosed inside a protective sheath, wherein: monitoring conductors, to monitor wear of the electric cable, are arranged inside the protective sheath electrically insulated from the electric conductors; and a monitoring device is operatively coupled to the monitoring conductors so as to detect at least one electric parameter associated with the monitoring conductors to detect the wear of the electric cable and generate corresponding monitoring data. The monitoring device obtains its own power supply from, and/or transmits the monitoring data by means of, the electric conductors of the same electric cable.
    Type: Application
    Filed: May 16, 2018
    Publication date: November 22, 2018
    Inventors: Roberto Gariboldi, Davide Bentivoglio
  • Publication number: 20180080971
    Abstract: The present invention refers to the field of industrial automation, with particular reference to industrial robotics and handling in general. In this field, in the present case, cable chains or sheaths for transporting and containing cables, cable bundles or flexible hoses are particularly relevant, said cables or hoses being led to the robotic or handling systems in which they are used. It is well known to those skilled in the art that the cables or hoses transported and housed in sheaths or chains are protected from external agents that could cause abrasions or breakages, but are still subjected to mutual rubbing and rubbing against the inner wall of said sheaths or chains. Moreover, the environments in which said cable means are used are harsh environments, so that the cable sheaths or chains are also subjected to shocks and strong external stresses and said stresses may, and often do, reverberate and cause equivalent damages to the cables or hoses they contain.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 22, 2018
    Inventor: Roberto Gariboldi
  • Publication number: 20050219183
    Abstract: A method creates a display device driverby steps including: considering transmittance characteristics in relation to voltages applied to plural liquid crystal displays; defining a transmittance curve based on the voltage applied to said displays, for each display; applying a gamma correction, with different values of the gamma exponent, to each transmittance curve; applying a kickback correction to each curve; positioning branch points along said curves; determining a resistance value for each branch point and for each curve for each display; choosing a minimum resistance value for each branch point; choosing a maximum resistance value of for each branch point; calculating the difference between said minimum resistance value and said maximum resistance value for each branch point; defining for each branch point a fixed resistance value equal to said minimum resistance value; defining for each branch point an interval of values for a variable resistance equal to said difference.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 6, 2005
    Applicants: STMicroelectronics S.r.I., DORA S.p.A.
    Inventors: Leonardo Sala, Fulvio Bagarelli, Roberto Gariboldi
  • Publication number: 20050057466
    Abstract: A method for driving low consumption LCD modules, the LCD modules having a multiplicity of display elements located at the intersections of a matrix having a plurality of row electrodes and a plurality of column electrodes, the method includes the phases of applying an M bit electrical digital signal to at least one row electrode at a time, subdivided in a plurality of time intervals equal to 2M?1, the electrical digital signal suitable for illuminating each of the display elements with a predefined luminosity level chosen from among 2M luminosity levels, each of the M bits is applied for a preset duration, then reducing the preset duration of each of the M bits in accordance with a predefined scale factor K and subdividing the M bits in (2M?1)/K plurality of time intervals.
    Type: Application
    Filed: July 22, 2004
    Publication date: March 17, 2005
    Applicants: STMicroelectronics S.r.l., DORA S.p.A.
    Inventors: Leonardo Sala, Daniele Domanin, Roberto Gariboldi
  • Patent number: 6842162
    Abstract: A new memory controller for use in a display, such as a liquid crystal display of the type comprising a set of first drivers, a set of second drivers, a portion of which can be converted to the first drivers, and a RAM memory structured to accept data at an input and output the data to the sets of first and second drivers when a master clock signal is received at the RAM memory. The memory controller includes a clock signal generator structured to generate the master clock signal; and a control signal generator circuit structured to generate control signals for the RAM memory and the sets of first and second drivers.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: January 11, 2005
    Assignees: STMicroelectronics S.r.l., TECDIS S.p.A.
    Inventors: Roberto Gariboldi, Riccardo Lavorerio, Leonardo Sala, Giovanni Nidasio
  • Publication number: 20040145553
    Abstract: The present invention refers to a method for scanning sequence selection for displays. In one scanning sequence selection for displays having a plurality of rows and columns, the plurality of rows and columns cross each other defining a plurality of optical elements having a first optical state and a second optical state in response to a first electric state and to a second electric state. The method includes the phases of driving the plurality of rows of the display according to a prefixed scanning ordering. The prefixed scanning ordering is predisposed by ordering every column of the columns so that the total switching number between said first electric state and said second electric state is minimized.
    Type: Application
    Filed: October 17, 2003
    Publication date: July 29, 2004
    Inventors: Leonardo Sala, Daniele Domanin, Roberto Gariboldi, Santo Ilardo
  • Publication number: 20040032403
    Abstract: The present invention relates to a driving method for flat panel display devices, particularly a driving method combining a Multi Line Addressing (MLA) technique and a Frame Rate Control (FRC) technique, for flat panel display devices such as Liquid Crystal Display (LCD).
    Type: Application
    Filed: May 23, 2003
    Publication date: February 19, 2004
    Applicant: STMicroelectronics S.r.I. and DORA S.p.A.
    Inventors: Leonardo Sala, Daniele Domanin, Roberto Gariboldi
  • Patent number: 6577171
    Abstract: A high side circuit includes at least one power device having a first non-drivable terminal connected to a supply voltage, at least one load connected between a second non-drivable terminal of the power device and ground, and driving circuitry. The driving circuitry includes transistors which are connected to each other and to a higher voltage than the supply voltage in order to control the turning on and the turning off of the power device and to reduce or minimize the potential difference between the second non-drivable terminal and a drivable terminal of the power device during the turning off state to avoid the re-turning on of the same power device.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: June 10, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Filippo, Aldo Novelli, Roberto Gariboldi, Angelo Genova
  • Patent number: 6518830
    Abstract: A high-efficiency electronic circuit generates and regulates a supply voltage and includes a charge-pump voltage multiplier which is associated with an oscillator and has an output connected to a voltage regulator in order to ultimately output said supply voltage. Advantageously, the circuit comprises a first hysteresis comparator having as inputs the regulator output and the multiplier output, and comprises a second hysteresis comparator having as inputs a reference potential and a partition of the voltage presented on the regulator output. The comparators are structurally and functionally independent of each other, and their outputs are coupled to the oscillator through a logic circuit to modulate the oscillator operation.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: February 11, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Gariboldi, Riccardo Lavorerio, Leonardo Sala, Giovanni Nidasio
  • Patent number: 6507227
    Abstract: The device and method monitor the current delivered to a load through a power transistor including a sense transistor. The circuit includes a disturbances attenuating circuit that has a differential stage, and first, second and third stages referenced to ground, the respective input nodes of which are connected in common to an output node of the differential stage. The third stage is formed by a transistor identical to a transistor of the first stage and delivers a current signal through a current terminal thereof, proportional to the current being delivered to the load.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: January 14, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Genova, Roberto Gariboldi, Aldo Novelli, Giulio Ricotti
  • Publication number: 20020070794
    Abstract: A high-efficiency electronic circuit generates and regulates a supply voltage and includes a charge-pump voltage multiplier which is associated with an oscillator and has an output connected to a voltage regulator in order to ultimately output said supply voltage. Advantageously, the circuit comprises a first hysteresis comparator having as inputs the regulator output and the multiplier output, and comprises a second hysteresis comparator having as inputs a reference potential and a partition of the voltage presented on the regulator output. The comparators are structurally and functionally independent of each other, and their outputs are coupled to the oscillator through a logic circuit to modulate the oscillator operation.
    Type: Application
    Filed: August 21, 2001
    Publication date: June 13, 2002
    Applicant: STMicroelectronics S.r.l
    Inventors: Roberto Gariboldi, Riccardo Lavorerio, Leonardo Sala, Giovanni Nidasio
  • Publication number: 20020063573
    Abstract: The device and method monitor the current delivered to a load through a power transistor including a sense transistor. The circuit includes a disturbances attenuating circuit that has a differential stage, and first, second and third stages referenced to ground, the respective input nodes of which are connected in common to an output node of the differential stage. The third stage is formed by a transistor identical to a transistor of the first stage and delivers a current signal through a current terminal thereof, proportional to the current being delivered to the load.
    Type: Application
    Filed: September 6, 2001
    Publication date: May 30, 2002
    Applicant: STMicroelectronics S.r.I.
    Inventors: Angelo Genova, Roberto Gariboldi, Aldo Novelli, Giulio Ricotti
  • Publication number: 20020057240
    Abstract: A new memory controller for use in a display, such as a liquid crystal display of the type comprising a set of first drivers, a set of second drivers, a portion of which can be converted to the first drivers, and a RAM memory structured to accept data at an input and output the data to the sets of first and second drivers when a master clock signal is received at the RAM memory. The memory controller includes a clock signal generator structured to generate the master clock signal; and a control signal generator circuit structured to generate control signals for the RAM memory and the sets of first and second drivers.
    Type: Application
    Filed: August 20, 2001
    Publication date: May 16, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Roberto Gariboldi, Riccardo Lavorerio, Leonardo Sala, Giovanni Nidasio
  • Patent number: 6150867
    Abstract: An integrated device for a switching system is disclosed. The device includes control circuitry for generating at least one switching control signal, reference circuitry for generating at least one reference quantity, a using circuit for using the reference quantity, a circuit for storing the reference quantity, and a switch which, in a first operative condition, connects the reference circuit to the using circuit and to the storage circuit in order to apply the reference quantity thereto. In a second operative condition, the switch disconnects the reference circuit from the using circuit and connects the storage circuit to the using circuit in order to apply the stored reference quantity thereto. Finally, the device includes filtering circuitry for keeping the switch in the second operative condition for a filtering period in accordance with the switching of the control signal.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: November 21, 2000
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Angelo Genova, Giuseppe Cantone, Roberto Gariboldi
  • Patent number: 6107758
    Abstract: A circuit is described with which an operation circuit for a discharge lamp can be switched between operation states with different lamp currents by hort interruptions of the power supply. Long interruptions than a certain time threshold result in basic state operation.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: August 22, 2000
    Assignees: Patent-Treuhand-Gesellschaft fuer elektrische Gluehlampen mbH, STMicroelectronics S.r.l.
    Inventors: Klaus Fischer, Roberto Gariboldi, Giuseppe Cantone
  • Patent number: 6075391
    Abstract: A circuit for charging a capacitance using an LDMOS integrated transistor functioning as a source follower and controlled, in a manner to emulate a high voltage charging diode of the capacitance. The LDMOS transistor is controlled via a bootstrap capacitor charged by a diode at the supply voltage of the circuit, and by an inverter driven by a logic control circuit as a function of a Low Gate Drive Signal and of a second logic signal which is active during a phase wherein the supply voltage is lower than the minimum switch-on voltage of the integrated circuit. The circuit uses a first zener diode to charge the bootstrap capacitor and the source of the transistor is connected to the supply node through a second zener diode.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: June 13, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Tarantola, Giuseppe Cantone, Angelo Genova, Roberto Gariboldi
  • Patent number: 6060948
    Abstract: A circuit for charging a capacitance using an LDMOS integrated transistor functioning as a source follower stage and controlled, in a manner to emulate a high voltage charging diode of the capacitance via a bootstrap capacitor charged by a diode connected to the supply node of the circuit, and by an inverter driven by a logic control circuit as a function of a first Low Gate Drive Signal and of a second logic signal. The second logic signal is active during a phase where the supply voltage is lower than the minimum switch-on voltage of the integrated circuit. The circuit further includes a second inverter functionally referred to the charging node of the bootstrap capacitor and to the voltage of the output node of the inverter. The second inverter has an input coupled to the second logic signal and an output coupled to the gate node of the LDMOS transistor for preventing accidental undue switch-on of the LDMOS transistor.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: May 9, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Tarantola, Giuseppe Cantone, Angelo Genova, Roberto Gariboldi
  • Patent number: 6031412
    Abstract: A circuit for charging a capacitance using an LDMOS integrated transistor controlled in a manner to emulate a high voltage charging diode of the capacitance. The circuit avoids the switch-on of parasitic bipolar transistors of the LDMOS structure during transient states. The circuit includes a number of junctions directly biased between a source node and a body node of the LDMOS transistor, a current generator referred to a ground of the circuit, at least one switch between the source and a first junction of a chain of directly biased junctions, and a limiting resistor connected between the body and the current generator referred to ground. The switch is open during a charging phase of the capacitance and is closed when the charging voltage of the capacitance exceeds a preestablished threshold responsive to a control signal.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: February 29, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Genova, Mario Tarantola, Giuseppe Cantone, Roberto Gariboldi
  • Patent number: 5945819
    Abstract: The invention relates to a voltage regulator connected between first and second voltage references and having an output terminal for delivering a regulated output voltage. The voltage regulator includes at least one voltage divider, connected between the output terminal and the second voltage reference, and a serial output element connected between the output terminal and the first voltage reference. The voltage divider is connected to the serial output element by a first conduction path which includes at least one error amplifier whose output is connected to at least one driver for turning off the serial output element. The voltage regulator includes, between the voltage divider and the serial output element, at least a second conduction path for turning off the serial output element according to a value of the regulated output voltage in advance of the action of the first conduction path.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: August 31, 1999
    Assignees: SGS-Thomson Microelectronics S.r.l., Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Riccardo Ursino, Roberto Gariboldi