Abstract: A charge pump MOS voltage booster has reduced voltage drops and ripple. This voltage booster is advantageously used in two applications. The voltage has four MOS transistors instead of diodes in a classical voltage booster, which exhibit an undesired voltage drop. The voltage booster also has an oscillator with two outputs and two corresponding charge transfer capacitors. In this manner, the undesired voltage drops and ripple are reduced without complicating the circuitry structure.

Abstract: The present invention is aimed at providing a method and a circuit for protecting the output stage of a power actuator against voltage transients of the surge type. In particular, it provides protection against voltage surge transients of the kind described by International Standard IEC 801-5, for a power transistor contained in the output stage of the actuator.The method of this invention provides for:the utilization of the power transistor (PW) intrinsic diode (DP) for dumping the transient energy to one of the supply generator terminals during a positive transient; andthe utilization of the power transistor (PW) restoration feature to the on state for dumping the energy thereinto during a negative transient, while simultaneously inhibiting the current limiting function.

Abstract: A protection circuit for at least one power transistor which has at least one control terminal and two main conduction terminals defining a main conduction path includes a first detection means designed to generate a first electrical signal approximately proportional to current flowing in the main conduction path. Second detection means are designed to generate a second electrical signal approximately proportional to voltage across the main conduction path. Multiplying means receive at input the first and second signals and are designed to generate an electrical product signal substantially corresponding to the product of at least the latter. A generator generates an electrical reference signal, and operational amplifier means receive at input the product signal and the reference signal and are designed to generate an electrical difference signal substantially corresponding to their difference.

Abstract: A method for detecting an open load includes the use of a driver having at least one main power transistor connected to the load and one auxiliary transistor connected in parallel with the main transistor between a first power supply voltage reference and a second voltage reference. The method compares a first voltage present on a terminal connected to the load of the main transistor with a second voltage present on a terminal of the auxiliary transistor. A circuit for detecting an open load performs the method.

Abstract: A circuit for generating a reference voltage and detecting a drop in a supply voltage, comprising at least one threshold comparator having an input terminal and an output terminal, and a voltage divider connected between a first supply voltage reference and a second voltage reference and connected to the input terminal of the comparator, further provides for the output terminal of said comparator to be connected to the input terminal through at least one feedback network comprising at least one current generator. The feedback network further comprises a buffer block having an input terminal connected to said comparator and a first output terminal connected to a switch which is connected between a circuit node of said voltage divider and the second voltage reference.

Abstract: A non-dissipative device for protecting an integrated circuit having multiple independent channels against overloading. The non-dissipative device includes an input terminal and an output terminal having an integrated switch connected therebetween which consists of an input portion, a logic gate with two inputs a control portion, and an output portion, all connected in series with one another. The device further includes a generating circuit for generating the on-times and off-times of the integrated switch, the generating circuit is connected between an output of the output portion and an input of the logic gate.

Abstract: An oscillating circuit including a capacitor, a charge circuitry and a control circuitry. The charge circuitry includes first and second current generators having respectively first and second current values that are opposite in direction and a switching circuit designed to couple alternately the generators to the capacitor. The control circuitry has a voltage input coupled to the capacitor and an output coupled to control inputs of the switching circuit and includes a comparator with hysteresis having a lower threshold and an upper threshold. The difference between the upper threshold and the lower threshold is chosen to be substantially proportional to the ratio of the product to the sum of the two current values such that the oscillation frequency and the duty cycle do not depend on the supply voltage, the temperature and the process.

Abstract: Power consumption by the driving circuitry of an output stage, employing a slew-rate controlling operational amplifier, is reduced by modulating the level of the current output by the operational amplifier in function of the working conditions of the output stage. Switching delay may also be effectively reduced. An auxiliary current generator forces an additional current through the conducting one of the pair of input transistors of the operational amplifier only during initial and final phases of a transition, essentially when the slew rate control loop ceases to be effective. The boosting of the bias current through the conducting input transistor is determined by the degree of unbalance of the differential input stage of the operational amplifier, without the use of dissipative sensing elements.

Abstract: A drive circuit includes a voltage source supplying a reference voltage at its output; a voltage elevating circuit connected to a supply voltage and to the output of the voltage source, and supplying at its output, under normal operating conditions, a drive voltage greater than the supply voltage and increasing with the reference voltage. The input of the voltage source is connected to the output of the voltage elevating circuit, and defines a positive feedback path resulting in an increase in the reference voltage corresponding to an increase in the drive voltage, and therefore results in a corresponding increase in the drive voltage up to a maximum permissible value, thus providing for a sufficient drive voltage for driving the gate-source junction of power MOS transistors, even in the presence of a low supply voltage.

Abstract: A charge pump circuit includes a pair of series switching devices coupled between an output node of the circuit and an input node. A power stage drives a charge transfer capacitor which is coupled to an intermediate node between the series switching devices. The power stage has an input coupled to the input node of the circuit, The power stage further includes a bootstrap capacitor for maintaining a conductive state during an entire half of a cycle of a period of oscillation of a local oscillator. The series switching devices may be driven in phase opposition by either a CMOS invertor or a pair of comparators.

Abstract: A regulator including a power element between the input terminal and output terminal; and a regulating loop including a differential stage for comparing the output voltage of the regulator with a reference voltage and accordingly driving a gain stage connected to the power element. The output voltage is picked up by the differential stage via a resistive divider, the resistance of which varies according to the value of a logic signal at a control input. When the resistance of the divider changes, the inputs of the differential stage are so unbalanced as to produce an output voltage up or down ramp equal to the slew rate of the regulating loop and proportional to the bias current of the differential stage. Over the up ramp, the shorting protection circuit is turned off for a predetermined time .tau., whereas, over the down ramp, a stage is turned on for absorbing the discharge current of the capacitive load.

Abstract: A drive circuit for a field-effect transistor is disclosed, the field-effect transistor having a drain terminal connected to the positive pole of a voltage supply and a source terminal connected to a load. The drive circuit comprises a first transistor connected between the gate terminal of the field-effect transistor and the negative pole of the voltage supply for turning off the field-effect transistor. The first transistor is driven by an operational amplifier which has inverting and non-inverting teminals connected to the gate and source terminals of the field-effect transistor, respectively. Switches alternatively intercouple the field-effect transistor to either another voltage supply or the first transistor.

Abstract: A drive circuit includes a voltage source supplying a reference voltage at its output; a voltage elevating circuit connected to a supply voltage and to the output of the voltage source, and supplying at its output, under normal operating conditions, a drive voltage greater than the supply voltage and increasing with the reference voltage. The input of the voltage source is connected to the output of the voltage elevating circuit, and defines a positive feedback path resulting in an increase in the reference voltage corresponding to an increase in the drive voltage, and therefore results in a corresponding increase in the drive voltage up to a maximum permissible value, thus providing for a sufficient drive voltage for driving the gate-source junction of power MOS transistors, even in the presence of a low supply voltage.

Abstract: An output stage with a protection circuit against negative overvoltage at its output terminal, having a transistor with collector output and with the emitter connected to a reference voltage line; a diode for protection against negative overvoltages present on the output is arranged between the collector and the output of the stage. In order to give the output of the stage a presettable minimum voltage level, the reference voltage line is set to a preset voltage which differs from the ground voltage. For this purpose, the circuit comprises an operational amplifier in a voltage-follower configuration, the output whereof is connected to the reference voltage line, a diode which is connected between the ground and the non-inverting terminal of the operational amplifier, and a current source which is connected between the non-inverting input of the operational amplifier and a negative supply line.

Abstract: A negative overvoltage protection circuit for an insulated vertical PNP transistor the emitter whereof defines the input, the collector whereof defines the output and the base whereof is connected to an NPN driving transistor. In order to maximally extend the negative overvoltage which can be applied to the output, the protection circuit comprises an output voltage sensor, a voltage reference, a comparator which is connected in input to the voltage reference and to the sensor and generates in output an activation signal when the output voltage of the PNP transistor becomes smaller than the reference, a switch which is controlled by the comparator to switch off the NPN driving transistor upon the reception of the activation signal and a low-impedance circuit which is connected between the emitter and the base of the insulated vertical PNP transistor and is activated by the activation signal, in a manner suitable for bringing the insulated vertical PNP transistor practically to BV.sub.CBO.

Abstract: A series voltage regulator includes a protective circuit that detects the collector current from a PBP power transistor and the collector-emitter voltage thereof. Such current and voltage signals are generated, respectively, by an auxiliary PNP transistor having a collector current which is proportional to that of the PNP power transistor, and by a circuit connected between the emitter and the collector of the PNP power transistor. The collector current and collector emitter voltage signals are processed by a circuit which, whenever the current and voltage values are greater than preset maximum values, reduces the PNP power transistor current and maintains it within permissible limits. The protective circuit does not affect the minimum voltage drop between the input and output of the regulator and may be dimensioned so as to use the maximum extent of the S.O.A. of the PNP power transistor.

Abstract: A circuit for limiting the transient overvoltage across a power transistor connected in series with an inductive load between a supply rail and a ground rail of the circuit and operated to switch ON-OFF the inductive load utilizes a comparator circuit for switching-ON again the power transistor in order to discharge the energy stored in the load's inductance. The voltage across the power transistor is sensed by a first voltage divider, while a reference voltage is obtained by a second voltage divider connected between the supply and ground. The circuit is practically insensitive to temperature and to variations of the supply voltage and is easily implemented.

Abstract: Described is an antisaturation circuit for an integrated PNP transistor characterized by a comparator circuit comprising two transistors and a current generator whose output current corresponds to a pre-established function, e.g., an exponential function, of the emitter current of said transistor. The changing of state of the comparator circuit, as determined by said pre-established function of said current generator, is determined by the drop of the V.sub.CE voltage of the transistor below a preset minimum value, with a portion of the conduction current of one of the two transistors of the comparator circuit utilized for increasing the forced .beta. of the transistor. This limits the degree of its saturation, as well as the leakage current toward the substrate.