Patents by Inventor Roelf Anco Jacob Groenhuis

Roelf Anco Jacob Groenhuis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10315821
    Abstract: One example discloses a component carrier, including: a cavity; wherein the cavity includes a set of cavity registration features configured to engage with a set of component registration features on a component; and wherein the cavity registration features are within the cavity.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: June 11, 2019
    Assignee: NXP B.V.
    Inventors: Jeroen Johannes Maria Zaal, Roelf Anco Jacob Groenhuis, Leo van Gemert, Caroline Catharina Maria Beelen-Hendrikx
  • Patent number: 10177111
    Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: January 8, 2019
    Assignee: NXP B.V.
    Inventors: Tonny Kamphuis, Leonardus Antonius Elisabeth van Gemert, Roelf Anco Jacob Groenhuis, Caroline Catharina Maria Beelen-Hendrikx, Jetse de Witte, Franciscus Henrikus Martinus Swartjes
  • Publication number: 20180134473
    Abstract: One example discloses a component carrier, including: a cavity; wherein the cavity includes a set of cavity registration features configured to engage with a set of component registration features on a component; and wherein the cavity registration features are within the cavity.
    Type: Application
    Filed: November 15, 2016
    Publication date: May 17, 2018
    Inventors: Jeroen Johannes Maria Zaal, Roelf Anco Jacob Groenhuis, Leo van Gemert, Caroline Catharina Maria Beelen-Hendrikx
  • Patent number: 9842776
    Abstract: Integrated circuit dies within a semiconductor wafer are separated using an approach that may facilitate mitigation of warpage, cracking and other undesirable aspects. As may be implemented in accordance with one or more embodiments, a semiconductor wafer is provided with a plurality of integrated circuit dies and first and second opposing surfaces, and with the second surface of the wafer being ground. A first mold compound is applied to the ground second surface, and the integrated circuit dies are separated along saw lanes while using the first mold compound to hold the dies in place. The integrated circuit dies are encapsulated with the mold compounds, by applying the second mold compound to the first surface and along sidewalls of the integrated circuit dies.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: December 12, 2017
    Assignee: NXP B.V.
    Inventors: John Suman Nakka, Tonny Kamphuis, Roelf Anco Jacob Groenhuis
  • Publication number: 20170200646
    Abstract: Integrated circuit dies within a semiconductor wafer are separated using an approach that may facilitate mitigation of warpage, cracking and other undesirable aspects. As may be implemented in accordance with one or more embodiments, a semiconductor wafer is provided with a plurality of integrated circuit dies and first and second opposing surfaces, and with the second surface of the wafer being ground. A first mold compound is applied to the ground second surface, and the integrated circuit dies are separated along saw lanes while using the first mold compound to hold the dies in place. The integrated circuit dies are encapsulated with the mold compounds, by applying the second mold compound to the first surface and along sidewalls of the integrated circuit dies.
    Type: Application
    Filed: January 13, 2016
    Publication date: July 13, 2017
    Inventors: John Suman Nakka, Tonny Kamphuis, Roelf Anco Jacob Groenhuis
  • Patent number: 9704823
    Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: July 11, 2017
    Assignee: NXP B.V.
    Inventors: Tonny Kamphuis, Roelf Anco Jacob Groenhuis, Leonardus Antonius Elisabeth van Gemert, Caroline Catharina Maria Beelen-Hendrikx, Jetse de Witte, Franciscus Henrikus Martinus Swartjes
  • Publication number: 20170179076
    Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
    Type: Application
    Filed: March 6, 2017
    Publication date: June 22, 2017
    Inventors: Tonny Kamphuis, Leonardus Antonius Elisabeth van Gemert, Roelf Anco Jacob Groenhuis, Caroline Catharina Maria Beelen-Hendrikx, Jetse de Witte, Franciscus Henrikus Martinus Swartjes
  • Patent number: 9466585
    Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: October 11, 2016
    Assignee: NXP B.V.
    Inventors: Tonny Kamphuis, Leonardus Antonius Elisabeth van Gemert, Roelf Anco Jacob Groenhuis, Caroline Catharina Maria Beelen-Hendrikx, Franciscus Henrikus Martinus Swartjes, Jetse de Witte
  • Publication number: 20160276176
    Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
    Type: Application
    Filed: October 29, 2015
    Publication date: September 22, 2016
    Inventors: Tonny Kamphuis, Roelf Anco Jacob Groenhuis, Leonardus Antonius Elisabeth van Gemert, Caroline Catharina Maria Beelen-Hendrikx, Jetse de Witte, Franciscus Henrikus Martinus Swartjes
  • Publication number: 20160276306
    Abstract: Consistent with example embodiments, a wafer substrate undergoes processing in which a resilient material is applied to the front-side and back-side surfaces of the wafer substrate. By defining trenches in saw lanes between active device die, additional resilient material may be placed therein. In an example embodiment, after the active device die are separated into individual product devices, the resulting product device has coverage on the front-side surface, back-side surface, and the four vertical faces of the encapsulated active device die. The front-side surface has exposed contact areas so that the product device may be attached to an end user's system circuit board. Further, the resilient coating protects the encapsulated active device die from damage during assembly.
    Type: Application
    Filed: October 29, 2015
    Publication date: September 22, 2016
    Inventors: Tonny Kamphuis, Leonardus Antonius Elisabeth van Gemert, Roelf Anco Jacob Groenhuis, Caroline Catharina Maria Beelen-Hendrikx, Franciscus Henrikus Martinus Swartjes, Jetse de Witte
  • Patent number: 9418919
    Abstract: Consistent with an example embodiment, there is surface-mountable non-leaded chip carrier for a semiconductor device. The device comprises a first contact. A second contact is relative to the first contact; the second contact has a split therein to provide first and second portions of the second contact arranged relative to one another to lessen tilting of a soldering condition involving attachment of the chip carrier to a printed circuit board.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: August 16, 2016
    Assignee: NXP B.V.
    Inventors: Roelf Anco Jacob Groenhuis, Markus Björn Erik Noren, Fei-ying Wong, Hei-ming Shiu
  • Patent number: 9418918
    Abstract: There is disclosed a lead for connection to a semiconductor device die, the lead comprising a clip portion. The clip portion comprises a major surface having two or more protrusions extending therefrom for connection to a bond pad of the semiconductor device die.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: August 16, 2016
    Assignee: NXP B.V.
    Inventors: Roelf Anco Jacob Groenhuis, Tim Boettcher
  • Publication number: 20160211197
    Abstract: Consistent with an example embodiment, there is surface-mountable non-leaded chip carrier for a semiconductor device. The device comprises a first contact. A second contact is relative to the first contact; the second contact has a split therein to provide first and second portions of the second contact arranged relative to one another to lessen tilting of a soldering condition involving attachment of the chip carrier to a printed circuit board.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 21, 2016
    Applicant: NXP B.V.
    Inventors: Roelf Anco Jacob GROENHUIS, Markus Björn Erik NOREN, Fei-ying WONG, Hei-ming SHIU
  • Patent number: 9263335
    Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: February 16, 2016
    Assignee: NXP B.V.
    Inventors: Tim Boettcher, Sven Walczyk, Roelf Anco Jacob Groenhuis, Rolf Brenner, Emiel De Bruin
  • Publication number: 20160005679
    Abstract: Consistent with an example embodiment, there is a method for packaging an integrated circuit (IC) device. The method comprises attaching a lead frame to the carrier tape; the lead frame has an array of device positions on the carrier tape and pad landings surround the device positions for making electrical connections to the plurality of active device die. A plurality of active device die are mounted on the carrier tape within the array of device positions; each said active device die has bond pads, each of said active device die has been subjected to back-grinding to a prescribed thickness and has a solderable conductive surface on its underside. On the bond pads, the plurality of active devices are wire bonded to the pad landings on the lead frame. The lead frame and wire bonded active devices are encapsulated, leaving the solderable die backside and lead frame backside exposed.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Inventors: Emil Casey Israel, Leonardus Antonius Elisabeth van Gemert, Roelf Anco Jacob Groenhuis
  • Patent number: 9222989
    Abstract: A sensor package includes a lead frame with a first portion extending and a second portion extending in a direction inclined with respect to the first potion. The sensor package also includes an application specific integrated circuit and a magneto resistive sensor and a ferrite provided with a molding body.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: December 29, 2015
    Assignee: NXP B.V.
    Inventors: Paulus Martinus Catharina Hesen, Roelf Anco Jacob Groenhuis, Johannes Wilhelmus Dorotheus Bosch
  • Publication number: 20150287666
    Abstract: There is disclosed a lead for connection to a semiconductor device die, the lead comprising a clip portion. The clip portion comprises a major surface having two or more protrusions extending therefrom for connection to a bond pad of the semiconductor device die.
    Type: Application
    Filed: March 25, 2015
    Publication date: October 8, 2015
    Inventors: Roelf Anco Jacob Groenhuis, Tim Boettcher
  • Publication number: 20150140739
    Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.
    Type: Application
    Filed: January 28, 2015
    Publication date: May 21, 2015
    Inventors: Tim BOETTCHER, Sven WALCZYK, Roelf Anco Jacob GROENHUIS, Rolf BRENNER, Emiel DE BRUIN
  • Patent number: 8981566
    Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: March 17, 2015
    Assignee: NXP B.V.
    Inventors: Tim Boettcher, Sven Walczyk, Roelf Anco Jacob Groenhuis, Rolf Brenner, Emiel De Bruin
  • Patent number: 8884410
    Abstract: A method for manufacturing a microelectronic package (1) comprises the steps of providing at least two members (10, 11, 16) comprising electrically conductive material; providing a microelectronic device (15); placing the electrically conductive members (10, 11, 16) and the microelectronic device (15) in predetermined positions with respect to each other, and establishing electrical connections between each of the electrically conductive members (10, 11, 16) and the microelectronic device (15); and providing a non-conductive material for encapsulating the microelectronic device (15) and a portion of the electrically conductive members (10, 11, 16) connected thereto. The electrically conductive members (10, 11, 16) are intended to be used for realizing contact of the microelectronic device (15) arranged inside the package (1) to the external world.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: November 11, 2014
    Assignee: NXP B.V.
    Inventors: Peter Wilhelmus Maria Van De Water, Paulus Martinus Catharina Hesen, Roelf Anco Jacob Groenhuis