Patents by Inventor Roelf Anco Jacob Groenhuis
Roelf Anco Jacob Groenhuis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140130346Abstract: Sensor package 1 and a corresponding manufacturing method, wherein the sensor package 1 includes several components like a magneto resistive sensor 40 and electronic components 30, and the orientation of the elements and components is maintained by a moulding body 200 manufactured in a single moulding step.Type: ApplicationFiled: January 15, 2014Publication date: May 15, 2014Applicant: NXP B.V.Inventors: Paulus Martinus Catharina HESEN, Roelf Anco Jacob GROENHUIS, Johannes Wilhelmus Dorotheus BOSCH
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Patent number: 8664946Abstract: In one embodiment, a sensor package includes a lead frame with a first portion extending and a second portion extending in a direction inclined with respect to the first potion. The sensor package also includes an application specific integrated circuit and a magneto resistive sensor and a ferrite provided with a molding body.Type: GrantFiled: February 13, 2008Date of Patent: March 4, 2014Assignee: NXP B.V.Inventors: Paulus Martinus Catharina Hesen, Roelf Anco Jacob Groenhuis, Johannes Wilhelmus Dorotheus Bosch
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Publication number: 20130334695Abstract: The invention relates to an electronic device (200) for protection against transient voltages in high-power applications. The electronic device (200) comprises: i) a semiconductor substrate (220) comprising an active element (Dd) having at least two terminals (T1, T2); ii) a conductive pad (225) provided on said substrate (220) and being electrically coupled to one of said terminals (T1, T2); iii) electrically-conductive solder material (226) provided on the conductive pad (225); iv) a first conductive part (230) electrically coupled to the conductive pad (225) via the electrically-conductive interconnect material (226). The electronic device further comprises a wall (229) being provided along the periphery of the conductive pad (225) for forming a lateral confinement of the interconnect material (226) on the conductive pad (225). The invention further relates to a method of manufacturing such electronic device.Type: ApplicationFiled: June 5, 2013Publication date: December 19, 2013Inventors: Edwin TIJSSEN, Sven WALCZYK, Roelf Anco Jacob GROENHUIS, Rüdiger WEBER, Chee Wee TEE
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Publication number: 20130320551Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.Type: ApplicationFiled: May 8, 2013Publication date: December 5, 2013Applicant: NXP B.VInventors: Tim BOETTCHER, Sven WALCZYK, Roelf Anco Jacob GROENHUIS, Rolf BRENNER, Emiel DE BRUIN
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Patent number: 8508035Abstract: Aspects of the present invention are directed to circuits, circuit packages and related methods. In accordance with various example embodiments, respective electrodes are implemented to facilitate contact to a semiconductor device via different surfaces and/or sidewalls, as may be useful in connecting the device to an external package having a plurality of semiconductor devices in which same-surface connections to the devices are spatially restricted. The semiconductor device has opposing surfaces and sidewalls connecting the surfaces, and contacts to respective different regions in the device. Respective electrodes are coupled to the respective contacts and extend along/around the device to provide access to the contacts via different surfaces.Type: GrantFiled: December 2, 2011Date of Patent: August 13, 2013Assignee: NXP B.V.Inventors: Roelf Anco Jacob Groenhuis, Sven Walczyk, Emiel Bruin, Rolf Brenner
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Publication number: 20130140705Abstract: Aspects of the present invention are directed to circuits, circuit packages and related methods. In accordance with various example embodiments, respective electrodes are implemented to facilitate contact to a semiconductor device via different surfaces and/or sidewalls, as may be useful in connecting the device to an external package having a plurality of semiconductor devices in which same-surface connections to the devices are spatially restricted. The semiconductor device has opposing surfaces and sidewalls connecting the surfaces, and contacts to respective different regions in the device. Respective electrodes are coupled to the respective contacts and extend along/around the device to provide access to the contacts via different surfaces.Type: ApplicationFiled: December 2, 2011Publication date: June 6, 2013Inventors: Roelf Anco Jacob Groenhuis, Sven Walczyk, Emiel Bruin, Rolf Brenner
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Publication number: 20120286399Abstract: In one embodiment, a method is provided for packaging a semiconductor die. A leadframe having a die-pad and one or more lead-pads is placed (502) on an assembly surface. The die-pad has a base portion (202) resting on the assembly surface, an upper portion (204) on the base portion extending laterally from the base portion, and a support arm (208) extending from and supporting the upper portion of die-pad. A semiconductor die (206) is wirebonded (504) to a top surface of the upper portion of the die-pad. The semiconductor die is wirebonded (506) to the one or more lead-pads (210). The semiconductor die and leadframe are encased (508) in a package material (802). The package material fills a space between the upper portion of the die-pad and the assembly surface. A portion of the support arm located in a cutting lane is removed (512).Type: ApplicationFiled: May 8, 2012Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Tim BOETTCHER, Sven WALCZYK, Fei-Ying WONG, Pompeo UMALI, Roelf Anco Jacob GROENHUIS, Bernd ROHRMOSER, ChiFai LEE, Markus Bjoern Erik NOREN, PaulPangHing TSANG
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Publication number: 20120286410Abstract: Disclosed is a discrete semiconductor device package (100) comprising a leadframe portion (10) comprising a recess (14) having a depth substantially equal to the thickness of the discrete semiconductor device (20), wherein a raised portion of the leadframe portion adjacent to said recess defines a first contact area (12); a discrete semiconductor device (20) in said recess, wherein the exposed surface (22) of the discrete semiconductor device defines a second contact area; a protective layer (30) covering the leadframe portion and the a discrete semiconductor device but not the first contact area and the second contact area; and respective plating layers (40) covering the first contact area and the second contact area. A method of manufacturing such a package and a carrier comprising such a package are also disclosed.Type: ApplicationFiled: November 10, 2011Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Roelf Anco Jacob GROENHUIS, Sven WALCZYK, Paul DIJKSTRA, Emiel de BRUIN
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Publication number: 20120181678Abstract: Consistent with an example embodiment, there is surface-mountable non-leaded chip carrier for a semiconductor device. The device comprises a first contact. A second contact is relative to the first contact; the second contact has a split therein to provide first and second portions of the second contact arranged relative to one another to lessen tilting of a soldering condition involving attachment of the chip carrier to a printed circuit board.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Applicant: NXP B.V.Inventors: Roelf Anco Jacob GROENHUIS, Markus Björn Erik NOREN, Fei-ying WONG, Hei-ming SHIU
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Patent number: 8183682Abstract: A method of packaging a semiconductor die. The method comprises mounting a semiconductor die to a die attach pad on a carrier and electrically coupling an electrode of the semiconductor die and a contact pad on the carrier with a clip carried by a sacrificial substrate. The method further comprises removing the sacrificial substrate to release the clip. The method may be extended to accommodate a carrier having multiple device regions each with a die attach pad and a contact pad for mounting multiple semiconductor die.Type: GrantFiled: October 27, 2006Date of Patent: May 22, 2012Assignee: NXP B.V.Inventors: Paul Dijkstra, Roelf Anco Jacob Groenhuis
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Publication number: 20120112351Abstract: Disclosed is a method of manufacturing a discrete semiconductor device package (100), comprising providing a wafer comprising a plurality of semiconductor devices (50), each of said semiconductor devices comprising a substrate (110) having a top contact (130) and a bottom contact (150); partially sawing said wafer with a first sawing blade such that the semiconductor devices are partially separated from each other by respective incisions (20); lining said incisions with an electrically insulating film (160); and sawing through said incisions with a second sawing blade such that the semiconductor devices are fully separated from each other. A resulting discrete semiconductor device package (100) and a carrier (200) comprising such a discrete semiconductor device package (100) are also disclosed.Type: ApplicationFiled: November 9, 2011Publication date: May 10, 2012Applicant: NXP B.V.Inventors: Sven WALCZYK, Roelf Anco Jacob GROENHUIS, Paul Dijkstra, Emiel de BRUIN, Rolf Brenner
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Publication number: 20110198738Abstract: A method for manufacturing a microelectronic package (1) comprises the steps of providing at least two members (10, 11, 16) comprising electrically conductive material; providing a microelectronic device (15); placing the electrically conductive members (10, 11, 16) and the microelectronic device (15) in predetermined positions with respect to each other, and establishing electrical connections between each of the electrically conductive members (10, 11, 16) and the microelectronic device (15); and providing a non-conductive material for encapsulating the microelectronic device (15) and a portion of the electrically conductive members (10, 11, 16) connected thereto. The electrically conductive members (10, 11, 16) are intended to be used for realizing contact of the microelectronic device (15) arranged inside the package (1) to the external world.Type: ApplicationFiled: October 16, 2009Publication date: August 18, 2011Applicant: NXP B.V.Inventors: Peter WIilhelmus Maria Van De Water, Paulus Martinus Catharina Hesen, Roelf Anco Jacob Groenhuis
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Patent number: 7944062Abstract: A die package (72) for a semiconductor die (20). A plurality of the die packages (72) are formed on a single carrier (10) by applying a body (55) of molding compound across a carrier (10) with an air cavity (70) defined in the molding compound about each of a plurality of device regions (12) of the carrier (10). After a semiconductor die (20) is attached inside the air cavity (70) of each device region (12) and electrically connected with at least one contact pad (14, 16, 18), a cover (68) is applied to close all of the air cavities (70). Following singulation, each semiconductor die (20) is located inside the sealed air cavity (70) of one die package (72). The molding compound of each die package (72) may be locked against movement relative to the device region (12) of the carrier (10) by locking features (30, 38, 48, 50).Type: GrantFiled: October 27, 2006Date of Patent: May 17, 2011Assignee: NXP B.V.Inventors: Roelf Anco Jacob Groenhuis, Paul Dijkstra
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Patent number: 7858444Abstract: The device has a carrier and an electric element. The carrier has a first and an opposed side and is provided with an connection layer, an intermediate layer and contact pads. The element is present at the first side and coupled to the connection layer. It is at least partially encapsulated by an encapsulation that extends into isolation areas between patterns in the intermediate layer. A protective layer is present at the second side of the carrier, which covers an interface between the contact pads and the intermediate layer.Type: GrantFiled: February 23, 2009Date of Patent: December 28, 2010Assignee: NXP B.V.Inventors: Cornelis Gerardus Schriks, Paul Dijkstra, Peter Wilhelmus Maria Van De Water, Roelf Anco Jacob Groenhuis, Johannus Wilhelmus Weekamp
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Publication number: 20100117171Abstract: Sensor package 1 and a corresponding manufacturing method, wherein the sensor package 1 includes several components like a magneto resistive sensor 40 and electronic components 30, and the orientation of the elements and components is maintained by a moulding body 200 manufactured in a single moulding step.Type: ApplicationFiled: February 13, 2008Publication date: May 13, 2010Applicant: NXP, B.V.Inventors: Paulus Martinus Catharina Hesen, Roelf Anco Jacob Groenhuis, Johannes Wilhelmus Dorotheus Bosch
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Publication number: 20090162791Abstract: The device has a carrier and an electric element. The carrier has a first and an opposed side and is provided with an connection layer, an intermediate layer and contact pads. The element is present at the first side and coupled to the connection layer. It is at least partially encapsulated by an encapsulation that extends into isolation areas between patterns in the intermediate layer. A protective layer is present at the second side of the carrier, which covers an interface between the contact pads and the intermediate layer.Type: ApplicationFiled: February 23, 2009Publication date: June 25, 2009Applicant: NXP B.V.Inventors: Cornelis Gerardus SCHRIKS, Paul DIJKSTRA, Peter Wilhelmus Maria VAN DE WATER, Roelf Anco Jacob GROENHUIS, Johannus Wilhelmus WEEKAMP
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Patent number: 7514801Abstract: The device has a carrier and an electric element. The carrier has a first and an opposed side and is provided with a connection layer, an intermediate layer and contact pads. The element is present at the first side and coupled to the connection layer. The element is at least partially encapsulated by an encapsulation that extends into isolation areas between patterns in the intermediate layer. A protective layer is present at the second side of the carrier, which covers an interface between the contact pads and the intermediate layer.Type: GrantFiled: October 12, 2004Date of Patent: April 7, 2009Assignee: NXP B.V.Inventors: Cornelis Gerardus Schriks, Paul Dijkstra, Peter Wilhelmus Maria Van De Water, Roelf Anco Jacob Groenhuis, Johannus Wilhelmus Weekamp
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Publication number: 20080277772Abstract: A method of packaging a semiconductor die (20). The method comprises mounting a semiconductor die (20) to a die attach pad (34) on a carrier (10) and electrically coupling an electrode (36) of the semiconductor die (20) and a contact pad (16) on the carrier (10) with a clip (54) carried by a sacrificial substrate (58). The method further comprises removing the sacrificial substrate (58) to release the clip (54). The method may be extended to accommodate a carrier (10) having multiple device regions (12, 13) each with a die attach pad (34) and a contact pad (16) for mounting multiple semiconductor die (20).Type: ApplicationFiled: October 27, 2006Publication date: November 13, 2008Applicant: NXP B.V.Inventors: Roelf Anco Jacob Groenhuis, Paul Dijkstra
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Publication number: 20080272475Abstract: A die package (72) for a semiconductor die (20). A plurality of the die packages (72) are formed on a single carrier (10) by applying a body (55) of molding compound across a carrier (10) with an air cavity (70) defined in the molding compound about each of a plurality of device regions (12) of the carrier (10). After a semiconductor die (20) is attached inside the air cavity (70) of each device region (12) and electrically connected with at least one contact pad (14, 16, 18), a cover (68) is applied to close all of the air cavities (70). Following singulation, each semiconductor die (20) is located inside the sealed air cavity (70) of one die package (72). The molding compound of each die package (72) may be locked against movement relative to the device region (12) of the carrier (10) by locking features (30, 38, 48, 50).Type: ApplicationFiled: October 27, 2006Publication date: November 6, 2008Applicant: NXP B.V.Inventors: Paul Dijkstra, Roelf Anco Jacob Groenhuis
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Patent number: 7247938Abstract: The carrier (30) comprises a first etch mask (14), a first metal layer (11), an intermediate layer (12), a second metal layer (13) and a second etch mask (17). Both the first and the second etch mask (14, 17) can be provided in one step by means of electrochemical plating. After the first metal layer (11) and the intermediate layer (12) have been patterned through the first etch mask (14), an electric element (20) can be suitably attached to the carrier (30) using conductive means. In this patterning operation, the intermediate layer (12) is etched further so as to create underetching below the first metal layer (11). After the provision of an encapsulation (40), the second metal layer (13) is patterned through the second etch mask (17). In this manner, a solderable device (10) is obtained without a photolithographic step during the assembly process.Type: GrantFiled: April 10, 2003Date of Patent: July 24, 2007Assignee: NXP B.V.Inventors: Roelf Anco Jacob Groenhuis, Paul Dijkstra, Cornelis Gerardus Schriks, Peter Wilhelmus Maria Van De Water