Patents by Inventor Roger A Dugas
Roger A Dugas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190259721Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: ApplicationFiled: April 29, 2019Publication date: August 22, 2019Applicant: Cufer Asset Ltd. L.L.C.Inventors: Roger Dugas, John Trezza
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Patent number: 10340239Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: GrantFiled: July 31, 2017Date of Patent: July 2, 2019Assignee: Cufer Asset Ltd. L.L.CInventors: Roger Dugas, John Trezza
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Publication number: 20180033754Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: ApplicationFiled: July 31, 2017Publication date: February 1, 2018Inventors: Roger Dugas, John Trezza
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Patent number: 9754907Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: GrantFiled: April 20, 2016Date of Patent: September 5, 2017Assignee: CUFER ASSET LTD. L.L.C.Inventors: Roger Dugas, John Trezza
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Publication number: 20160322320Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: ApplicationFiled: April 20, 2016Publication date: November 3, 2016Inventors: Roger Dugas, John Trezza
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Patent number: 9324629Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: GrantFiled: March 30, 2007Date of Patent: April 26, 2016Assignee: CUFER ASSET LTD. L.L.C.Inventors: Roger Dugas, John Trezza
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Publication number: 20120184028Abstract: A micro IVF chamber that enables rapid filling, hermetic sealing, and custom gas environment control for secure cell extraction, fertilization, culturing, insemination, macro and microscopic content examination, post examination rapid refilling, return to optimal gas levels and pH values, with direct view of cell in conventional microscopes while maintaining culture environment, designed for use in any incubator and multiple devices per shelf for optimum efficiency while maintaining integrity of individual devices and patient-culture identity in a simple one-sample clamp-and-go device is disclosed.Type: ApplicationFiled: January 19, 2011Publication date: July 19, 2012Inventors: John Robert Swanson, Roger A. Dugas, Leo V. McNamara, JR.
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Publication number: 20070172987Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: ApplicationFiled: March 30, 2007Publication date: July 26, 2007Inventors: Roger Dugas, John Trezza
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Publication number: 20060278331Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.Type: ApplicationFiled: January 10, 2006Publication date: December 14, 2006Inventors: Roger Dugas, John Trezza
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Patent number: 6857788Abstract: A system and method to facilitate receipt of an optoelectronic module in a first direction and make an electrical connection by movement of the module in a second direction different from the first direction.Type: GrantFiled: August 13, 2003Date of Patent: February 22, 2005Assignee: Xanoptix Inc.Inventor: Roger Dugas
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Publication number: 20050036743Abstract: A system and method to facilitate receipt of an optoelectronic module in a first direction and make an electrical connection by movement of the module in a second direction different from the first direction.Type: ApplicationFiled: August 13, 2003Publication date: February 17, 2005Inventor: Roger Dugas
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Patent number: 6804438Abstract: An optical device has a mating piece constructed to accept and mate with a commercially available optical connector, an optical module, and a spacer located between the mating piece and the optical module, the spacer maintaining the mating piece and the optical module in alignment relative to each other in at least the Z direction and one other direction.Type: GrantFiled: June 28, 2002Date of Patent: October 12, 2004Assignee: Xanoptix, Inc.Inventors: Richard Stack, Roger Dugas
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Patent number: 6776758Abstract: An ultrasound imaging system including an electromagnetically protected ultrasound TEE probe, a display for displaying ultrasound images, a housing including a transducer connector including at least one connection and a computer for processing electrical signals representative of received ultrasound echoes. The TEE probe includes a probe housing including an imaging sensor, an outer acoustic lens, a cable interconnect and an internal metal shield which surrounds the sensor and cable interconnect, and a cable including electrical conductors and electromagnetic cable shielding, the electrical conductors electrically connected to the cable interconnect at a first end, and the electrical conductors and the cable shielding are electrically connected to a transducer connector at a second end.Type: GrantFiled: October 11, 2002Date of Patent: August 17, 2004Assignee: Koninklijke Philips Electronics N.V.Inventors: Michael Eugene Peszynski, David Chang Garner, Timothy J. Savord, Roger Dugas, Hubert Yeung
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Publication number: 20040108101Abstract: A heat sink has a fenestrated outer surface and internal structure supporting the outer surface to facilitate heat transfer from, and provide structural rigidity to, the heat sink.Type: ApplicationFiled: December 9, 2002Publication date: June 10, 2004Inventor: Roger Dugas
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Publication number: 20040073118Abstract: An ultrasound imaging system including an electromagnetically protected ultrasound TEE probe, a display for displaying ultrasound images, a housing including a transducer connector including at least one connection and a computer for processing electrical signals representative of received ultrasound echoes. The TEE probe includes a probe housing including an imaging sensor, an outer acoustic lens, a cable interconnect and an internal metal shield which surrounds the sensor and cable interconnect, and a cable including electrical conductors and electromagnetic cable shielding, the electrical conductors electrically to the cable interconnect at a first end, and the electrical conductors and the cable shielding are electrically connected to a transducer connector at a second end. The internal metal shield is electrically connected to the cable shielding such that all elements inside a boundary formed by the transducer housing and outer acoustic lens are substantially electromagnetically protected.Type: ApplicationFiled: October 11, 2002Publication date: April 15, 2004Inventors: Michael Eugene Peszynski, David Chang Garner, Timothy J. Savord, Roger Dugas, Hubert K. Yeung
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Patent number: D543953Type: GrantFiled: September 2, 2003Date of Patent: June 5, 2007Assignee: Cubic Wafer, Inc.Inventors: Roger Dugas, Ross L. Frushour
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Patent number: D477312Type: GrantFiled: March 18, 2002Date of Patent: July 15, 2003Assignee: Xanoptix, Inc.Inventors: Roger Dugas, Richard Stack, Keith Kang, Mark Czoschke, John Trezza
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Patent number: D479828Type: GrantFiled: December 9, 2002Date of Patent: September 23, 2003Assignee: Xanoptix, Inc.Inventor: Roger Dugas
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Patent number: D479829Type: GrantFiled: December 9, 2002Date of Patent: September 23, 2003Assignee: Xanoptix Inc.Inventor: Roger Dugas
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Patent number: D490382Type: GrantFiled: December 9, 2002Date of Patent: May 25, 2004Assignee: Xanoptix, Inc.Inventor: Roger Dugas