Patents by Inventor Roger A Dugas

Roger A Dugas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190259721
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 22, 2019
    Applicant: Cufer Asset Ltd. L.L.C.
    Inventors: Roger Dugas, John Trezza
  • Patent number: 10340239
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: July 2, 2019
    Assignee: Cufer Asset Ltd. L.L.C
    Inventors: Roger Dugas, John Trezza
  • Publication number: 20180033754
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 1, 2018
    Inventors: Roger Dugas, John Trezza
  • Patent number: 9754907
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: September 5, 2017
    Assignee: CUFER ASSET LTD. L.L.C.
    Inventors: Roger Dugas, John Trezza
  • Publication number: 20160322320
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Application
    Filed: April 20, 2016
    Publication date: November 3, 2016
    Inventors: Roger Dugas, John Trezza
  • Patent number: 9324629
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: April 26, 2016
    Assignee: CUFER ASSET LTD. L.L.C.
    Inventors: Roger Dugas, John Trezza
  • Publication number: 20120184028
    Abstract: A micro IVF chamber that enables rapid filling, hermetic sealing, and custom gas environment control for secure cell extraction, fertilization, culturing, insemination, macro and microscopic content examination, post examination rapid refilling, return to optimal gas levels and pH values, with direct view of cell in conventional microscopes while maintaining culture environment, designed for use in any incubator and multiple devices per shelf for optimum efficiency while maintaining integrity of individual devices and patient-culture identity in a simple one-sample clamp-and-go device is disclosed.
    Type: Application
    Filed: January 19, 2011
    Publication date: July 19, 2012
    Inventors: John Robert Swanson, Roger A. Dugas, Leo V. McNamara, JR.
  • Publication number: 20070172987
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Application
    Filed: March 30, 2007
    Publication date: July 26, 2007
    Inventors: Roger Dugas, John Trezza
  • Publication number: 20060278331
    Abstract: A method for use with multiple chips, each respectively having a bonding surface including electrical contacts and a surface on a side opposite the bonding surface involves bringing a hardenable material located on a body into contact with the multiple chips, hardening the hardenable material so as to constrain at least a portion of each of the multiple chips, moving the multiple chips from a first location to a second location, applying a force to the body such that the hardened, hardenable material will uniformly transfer a vertical force, applied to the body, to the chips so as to bring, under pressure, a bonding surface of each individual chip into contact with a bonding surface of an element to which the individual chips will be bonded, at the second location, without causing damage to the individual chips, element, or bonding surface.
    Type: Application
    Filed: January 10, 2006
    Publication date: December 14, 2006
    Inventors: Roger Dugas, John Trezza
  • Patent number: 6857788
    Abstract: A system and method to facilitate receipt of an optoelectronic module in a first direction and make an electrical connection by movement of the module in a second direction different from the first direction.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: February 22, 2005
    Assignee: Xanoptix Inc.
    Inventor: Roger Dugas
  • Publication number: 20050036743
    Abstract: A system and method to facilitate receipt of an optoelectronic module in a first direction and make an electrical connection by movement of the module in a second direction different from the first direction.
    Type: Application
    Filed: August 13, 2003
    Publication date: February 17, 2005
    Inventor: Roger Dugas
  • Patent number: 6804438
    Abstract: An optical device has a mating piece constructed to accept and mate with a commercially available optical connector, an optical module, and a spacer located between the mating piece and the optical module, the spacer maintaining the mating piece and the optical module in alignment relative to each other in at least the Z direction and one other direction.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: October 12, 2004
    Assignee: Xanoptix, Inc.
    Inventors: Richard Stack, Roger Dugas
  • Patent number: 6776758
    Abstract: An ultrasound imaging system including an electromagnetically protected ultrasound TEE probe, a display for displaying ultrasound images, a housing including a transducer connector including at least one connection and a computer for processing electrical signals representative of received ultrasound echoes. The TEE probe includes a probe housing including an imaging sensor, an outer acoustic lens, a cable interconnect and an internal metal shield which surrounds the sensor and cable interconnect, and a cable including electrical conductors and electromagnetic cable shielding, the electrical conductors electrically connected to the cable interconnect at a first end, and the electrical conductors and the cable shielding are electrically connected to a transducer connector at a second end.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: August 17, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Michael Eugene Peszynski, David Chang Garner, Timothy J. Savord, Roger Dugas, Hubert Yeung
  • Publication number: 20040108101
    Abstract: A heat sink has a fenestrated outer surface and internal structure supporting the outer surface to facilitate heat transfer from, and provide structural rigidity to, the heat sink.
    Type: Application
    Filed: December 9, 2002
    Publication date: June 10, 2004
    Inventor: Roger Dugas
  • Publication number: 20040073118
    Abstract: An ultrasound imaging system including an electromagnetically protected ultrasound TEE probe, a display for displaying ultrasound images, a housing including a transducer connector including at least one connection and a computer for processing electrical signals representative of received ultrasound echoes. The TEE probe includes a probe housing including an imaging sensor, an outer acoustic lens, a cable interconnect and an internal metal shield which surrounds the sensor and cable interconnect, and a cable including electrical conductors and electromagnetic cable shielding, the electrical conductors electrically to the cable interconnect at a first end, and the electrical conductors and the cable shielding are electrically connected to a transducer connector at a second end. The internal metal shield is electrically connected to the cable shielding such that all elements inside a boundary formed by the transducer housing and outer acoustic lens are substantially electromagnetically protected.
    Type: Application
    Filed: October 11, 2002
    Publication date: April 15, 2004
    Inventors: Michael Eugene Peszynski, David Chang Garner, Timothy J. Savord, Roger Dugas, Hubert K. Yeung
  • Patent number: D543953
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: June 5, 2007
    Assignee: Cubic Wafer, Inc.
    Inventors: Roger Dugas, Ross L. Frushour
  • Patent number: D477312
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: July 15, 2003
    Assignee: Xanoptix, Inc.
    Inventors: Roger Dugas, Richard Stack, Keith Kang, Mark Czoschke, John Trezza
  • Patent number: D479828
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: September 23, 2003
    Assignee: Xanoptix, Inc.
    Inventor: Roger Dugas
  • Patent number: D479829
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: September 23, 2003
    Assignee: Xanoptix Inc.
    Inventor: Roger Dugas
  • Patent number: D490382
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: May 25, 2004
    Assignee: Xanoptix, Inc.
    Inventor: Roger Dugas