Abstract: An imager having special light shielded, optically black pixels in each row of the imager's pixel array. Ideally, the optically black pixels should only output black pixel and reset signals. Since the optically black pixels of each row experience the same row-wise noise as the active pixels in the associated row, the optically black signals are used as reference signals to cancel out the row-wise noise, from reset and pixel signals, seen in a particular row.

Abstract: A CMOS imager includes an array of active pixel sensors, wherein each pixel is associated with a respective column in the array. The imager also includes multiple circuits for reading out values of pixels from the active sensor array. Each readout circuit can be associated with a respective pair of columns in the array and can include first and second sample-and-hold circuits. The first and second sample-and-hold circuits are associated, respectively, with first and second columns of pixels in the array. Each readout circuit also includes an operational amplifier-based charge sensing circuit that selectively provides an amplified differential output signal based on signals sampled either by the first sample-and-hold circuit or the second sample-and-hold circuit. The readout circuit also has an analog-to-digital converter for converting the differential output to a corresponding digital signal using a successive approximation technique.

Abstract: Automatic exposure adjusting device considers the image on a pixel-by-pixel basis. Each pixel is characterized according to its most significant bits. After the pixels are characterized, the number of pixels in any particular group is counted. That counting is compared with thresholds which set whether the image is over exposed, under exposed, and can optionally also determine if the image is seriously over exposed or seriously under exposed. Adjustment of the exposure is carried out to bring the image to a more desired state.

Abstract: Automatic exposure adjusting device considers the image on a pixel-by-pixel basis. Each pixel is characterized according to its most significant bits. After the pixels are characterized, the number of pixels in any particular group is counted. That counting is compared with thresholds which set whether the image is over exposed, under exposed, and can optionally also determine if the image is seriously over exposed or seriously under exposed. Adjustment of the exposure is carried out to bring the image to a more desired state.

Abstract: A CMOS imager includes an array of active pixel sensors, wherein each pixel is associated with a respective column in the array. The imager also includes multiple circuits for reading out values of pixels from the active sensor array. Each readout circuit can be associated with a respective pair of columns in the array and can include first and second sample-and-hold circuits. The first and second sample-and-hold circuits are associated, respectively, with first and second columns of pixels in the array. Each readout circuit also includes an operational amplifier-based charge sensing circuit that selectively provides an amplified differential output signal based on signals sampled either by the first sample-and-hold circuit or the second sample-and-hold circuit. The readout circuit also has an analog-to-digital converter for converting the differential output to a corresponding digital signal using a successive approximation technique.

Abstract: A CMOS image pixel array formed on a chip is used for storing programmed information within the pixel array. Manufacturing lot and other data is written to the array during manufacturing and testing by applying a laser to pixels to render the photodiode defective. The programmed data is read from the pixel array using existing circuitry.

Abstract: Bad pixels areas in an optical device are investigated and corrected. An upper limit on the number of bad areas is defined. Each bad area can be one, or more than one pixel.

Abstract: A totally digital single chip camera includes communications to operate most of its structure in serial communication mode. The digital single chip camera include a D/A converter for converting an input digital word into an analog reference signal. The chip includes all of the necessary circuitry for operating the chip using a single pin.

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

Abstract: Look ahead shutter pointer used for exposure control determination. One shutter is used to remove the pixels from reset. This begins the integration process. The pixels are integrated by turning them on one by one and sampling their outputs sometime later. The amount of time between turning them on and sampling them can be varied. This can be done while the system is being used. In the preferred embodiment the time of exposure is changed at the interface between two frames to avoid problems in the image.

Abstract: An improved bus system having input ports and output ports for transporting data is described. The bus system includes bus lines, switching elements, and a sequencing element. The bus lines channel data from the input ports to the output ports. The switching elements are configured to place data from the input ports onto the bus lines. Each of the switching elements enable one of a group of data to be placed on each of the bus lines simultaneously. The sequencing element selects a predetermined number of the group of data on the bus lines and sequentially directs the selected number of data to the output ports at different points in time.

Abstract: A random access memory stores values indicative of fixed pattern noise from a pixel circuit, which are used to compensate the pixel output to compensate for the fixed pattern noise.

Abstract: A circuit has an analog-to-digital converter that, during a first mode of the circuit, is configured to use capacitors of the converter to furnish a digital representation of an analog input voltage. The circuit also has an amplifier that has a gain responsive to a capacitance, and the switches are configured to, during a second mode of the circuit, selectively connect the capacitors to the amplifier to select the gain.