Abstract: Process control methods, metrology targets and production systems are provided for reducing or eliminating process overlay errors. Metrology targets have pair(s) of periodic structures with different segmentations, e.g., no segmentation in one periodic structure and device-like segmentation in the other periodic structure of the pair. Process control methods derive metrology measurements from the periodic structures at the previous layer directly following the production thereof, and prior to production of the periodic structures at the current layer, and use the derived measurements to adjust lithography stage(s) that is part of production of the current layer. Production system integrate lithography tool(s) and metrology tool(s) into a production feedback loop that enables layer-by-layer process adjustments.

Abstract: A multiple-tool parameter set calibration and misregistration measurement method useful in the manufacture of semiconductor devices including using at least a first reference misregistration metrology tool using a first set of measurement parameters to measure misregistration between at least two layers on a wafer of a batch of wafers, thereby generating a first misregistration data set, transmitting the first set of parameters and the data set to a calibrated set of measurement parameters generator (CSMPG) which processes the first set of parameters and the data set thereby generating a calibrated set of measurement parameters which are transmitted from the CSMPG to calibrate at least one initially-uncalibrated misregistration metrology tool based on the calibrated set of measurement parameters.

Abstract: A system for analyzing one or more samples includes a sample analysis sub-system configured to perform one or more measurements on the one or more samples. The system further includes a controller configured to: receive design of experiment (DoE) data for performing the one or more measurements on the one or more samples; determine rankings for a set of target parameters; generate a recipe for performing the one or more measurements on the one or more samples based on the DoE data and the rankings of the set of target parameters; determine run parameters based on the recipe; perform the one or more measurements on the one or more samples, via the sample analysis sub-system, according to the recipe; and adjust the run parameters based on output data associated with performing the one or more measurements on the one or more samples.

Abstract: A method for optical inspection includes illuminating a patterned polymer layer on a semiconductor wafer with optical radiation over a range of infrared wavelengths, measuring spectral properties of the optical radiation reflected from multiple points on the patterned polymer layer over the range of infrared wavelengths, and based on the measured spectral properties, computing a complex refractive index of the patterned polymer layer.

Abstract: A misregistration measurement and region of interest selection system (MMRSS) for measuring misregistration between at least two layers on a wafer in the manufacture of semiconductor devices, the MMRSS including a set of misregistration metrology tools, including at least two misregistration metrology tools, and a misregistration analysis and region of interest selection engine operative to: analyze a plurality of misregistration measurement data sets associated with a set of regions of interest (ROIs) of at least one measurement site on the wafer and at least partially generated by at least one first misregistration metrology tool, and wherein each of the data sets is associated with a set of quality metrics, identify a recommended ROI and communicate the recommended ROI to at least one second misregistration metrology tool of the set of misregistration metrology tools, the second misregistration metrology tool being operative to generate misregistration metrology data associated with the recommended ROI.

Abstract: A method for process control in the manufacture of semiconductor devices including performing metrology on at least one Design of Experiment (DOE) semiconductor wafer included in a lot of semiconductor wafers, the lot forming part of a batch of semiconductor wafer lots, generating, based on the metrology, one or more correctables to a process used to manufacture the lot of semiconductor wafers and adjusting, based on the correctables, the process performed on at least one of; other semiconductor wafers included in the lot of semi-conductor wafers, and other lots of semiconductor wafers included in the batch.

Abstract: A dynamic misregistration measurement amelioration method including taking at least one misregistration measurement at multiple sites on a first semiconductor device wafer, which is selected from a batch of semiconductor device wafers intended to be identical, analyzing each of the misregistration measurements, using data from the analysis of each of the misregistration measurements to determine ameliorated misregistration measurement parameters at each one of the multiple sites, thereafter ameliorating misregistration metrology tool setup for ameliorated misregistration measurement at the each one of the multiple sites, thereby generating an ameliorated misregistration metrology tool setup and thereafter measuring misregistration at multiple sites on a second semiconductor device wafer, which is selected from the batch of semiconductor device wafers intended to be identical, using the ameliorated misregistration metrology tool setup.

Abstract: A target and method for using the same in the measurement of misregistration between at least a first layer and a second layer formed on a wafer in the manufacture of functional semiconductor devices on the wafer, the functional semiconductor devices including functional device structures (FDSTs), the target including a plurality of measurement structures (MSTs), the plurality of MSTs being part of the first layer and the second layer and a plurality of device-like structures (DLSTs), the plurality of DLSTs being part of at least one of the first layer and the second layer, the DLSTs sharing at least one characteristic with the FDSTs and the MSTs not sharing the at least one characteristic with the FDSTs.

Abstract: A metrology system may include a controller to receive a first metrology dataset associated with a first set of metrology target features on a sample including first features from a first exposure field on a first sample layer and second features from a second exposure field on a second sample layer, where the second exposure field partially overlaps the first exposure field. The controller may further receive a second metrology dataset associated with a second set of metrology target features including third features from a third exposure field on the second layer that overlaps the first exposure field and fourth features formed from a fourth exposure field on the first layer of the sample that overlaps the second exposure field. The controller may further determine fabrication errors based on the first and second metrology datasets and generate correctables to adjust a lithography tool based on the fabrication errors.

Abstract: A system for use with a misregistration metrology tool (MMT), the system including a database including a plurality of process variation (PV) categories and a corresponding plurality of parameter sets and a process variation accommodation engine (PVAE) including a measurement site process variation category associator (MSPVCA) operative to associate a measurement site being measured by the MMT, at least partially based on an MMT output relating to the measurement site, with a measurement site process variation category (MSPVC), the MSPVC being one of the plurality of PV categories, a measurement site parameter set retriever (MSPSR) operative to retrieve a measurement site parameter set (MSPS) corresponding to the MSPVC and a measurement site parameter set communicator (MSPSC) operative to communicate the MSPS to the MMT.

Abstract: A method and system for measuring misregistration between different layers of a semiconductor device, the method including providing a set of pupil inaccuracy scalable basis elements (PISBEs) relating to a plurality of patterned semiconductor device wafers (PSDWs), generating a single pupil image of a site on a PSDW, the PSDW being one of the plurality of PSDWs, by taking a single measurement of the site, the single pupil image including a plurality of site-specific pixels, calculating a set of site-specific pupil inaccuracy scalable basis element scaling factors (PISBESFs) for the single pupil image using the set of PISBEs and the plurality of site-specific pixels and calculating a site-specific misregistration value (SSMV) using the set of PISBEs and the set of site-specific PISBESFs.

Abstract: A method for optical inspection includes illuminating a patterned polymer layer on a semiconductor wafer with optical radiation over a range of infrared wavelengths, measuring spectral properties of the optical radiation reflected from multiple points on the patterned polymer layer over the range of infrared wavelengths, and based on the measured spectral properties, computing a complex refractive index of the patterned polymer layer.

Abstract: A method for measurement of misregistration in the manufacture of semiconductor device wafers, the method including measuring misregistration between layers of a semiconductor device wafer at a first instance and providing a first misregistration indication, measuring misregistration between layers of a semiconductor device wafer at a second instance and providing a second misregistration indication, providing a misregistration measurement difference output in response to a difference between the first misregistration indication and the second misregistration indication, providing a baseline difference output and ameliorating the difference between the misregistration measurement difference output and the baseline difference output.

Abstract: A metrology system includes a controller communicatively coupled to one or more metrology tools. In another embodiment, the controller includes one or more processors configured to execute program instructions causing the one or more processors to receive one or more overlay metrology measurements of one or more metrology targets of the metrology sample from the one or more metrology tools; determine tilt from the one or more measurement overlay measurements; and determine one or more correctables for at least one of one or more lithography tools or the one or more metrology tools to adjust for the tilt, where the one or more correctables are configured to reduce an amount of tilt in the sample or overlay inaccuracy of the one or more overlay metrology measurements. The program instructions further cause the one or more processors to predict tilt with a simulator based on at least the determined tilt.

Abstract: A metrology system and metrology methods are disclosed. The metrology system comprises a set of device features on a first layer of a sample, a first set of target features on a second layer of the sample and overlapping the set of device features, and a second set of target features on the second layer of the sample and overlapping the set of device features. Relative positions of a first set of Moiré fringes and a second set of Moiré fringes indicate overlay error between the first layer of the sample and the second layer of the sample.

Abstract: A data-driven misregistration parameter configuration and measurement system and method including simulating a plurality of measurement simulations of at least one multilayered semiconductor device, selected from a batch of multilayered semiconductor devices intended to be identical, using sets of measurement parameter configurations, generating simulation data for the device, identifying recommended measurement parameter configurations selected from sets of measurement parameter configurations, providing a multilayered semiconductor device selected from the batch, providing the at least one recommended set of measurement parameter configurations to a misregistration metrology tool having multiple possible sets of measurement parameter configurations, measuring at least one multilayered semiconductor device, selected from the batch, using the recommended set, thereby generating measurement data for the device, thereafter identifying a final recommended set of measurement parameter configurations and measuring

Abstract: A metrology system is disclosed, in accordance with one or more embodiments of the present disclosure. The metrology system includes a stage configured to secure a sample, one or more diffraction-based overlay (DBO) metrology targets disposed on the sample. The metrology system includes a light source and one or more sensors. The metrology system includes a set of optics configured to direct illumination light from the light source to the one or more DBO metrology targets of the sample, the set of optics including a half-wave plate, the half-wave plate selectively insertable into an optical path such that the half-wave plate selectively passes both illumination light from an illumination channel and collection light from a collection channel, the half-wave plate being configured to selectively align an orientation of linearly polarized illumination light from the light source to an orientation of a grating of the one or more DBO metrology targets.

Abstract: A metrology system includes a controller communicatively coupled to one or more metrology tools, the controller including one or more processors configured to execute program instructions causing the one or more processors to receive one or more metrology measurements of one or more metrology targets of a metrology sample, a metrology target of the one or more metrology targets including one or more target designs with one or more cells, the one or more target designs being generated on one or more layers of the metrology sample; determine one or more errors based on the one or more metrology measurements; and determine one or more correctables to adjust one or more sources of error corresponding to the one or more errors, the one or more correctables being configured to reduce an amount of noise in the one or more metrology measurements generated by the one or more sources of errors.

Abstract: A metrology system includes a controller communicatively coupled to one or more metrology tools, the controller including one or more processors configured to execute program instructions causing the one or more processors to receive one or more metrology measurements of one or more metrology targets of a metrology sample, a metrology target of the one or more metrology targets including one or more target designs with one or more cells, the one or more target designs being generated on one or more layers of the metrology sample; determine one or more errors based on the one or more metrology measurements; and determine one or more correctables to adjust one or more sources of error corresponding to the one or more errors, the one or more correctables being configured to reduce an amount of noise in the one or more metrology measurements generated by the one or more sources of errors.

Abstract: A method for measurement of misregistration in the manufacture of semiconductor device wafers, the method including measuring misregistration between layers of a semiconductor device wafer at a first instance and providing a first misregistration indication, measuring misregistration between layers of a semiconductor device wafer at a second instance and providing a second misregistration indication, providing a misregistration measurement difference output in response to a difference between the first misregistration indication and the second misregistration indication, providing a baseline difference output and ameliorating the difference between the misregistration measurement difference output and the baseline difference output.