Abstract: An inverter with a modular bus assembly is described. In various embodiments, the modular bus assembly includes a laminated motherboard and a plurality of capacitor daughtercards. The laminated motherboard can be configured to interface a plurality of phase-leg modules and a plurality of capacitor daughtercards through a plurality of terminals and connectors located on a bottom side or a top side of the laminated motherboard. The laminated motherboard includes a layer stack with a plurality of conductor layers. Each of the plurality of conductor layers is implemented with a net spacing from a neighboring plated through hole (PTH) based at least in part on differences in potential to be applied to each of the plurality of conductor layers as compared to a potential to be applied to the PTH. Embedded shield polygons can be implemented on the laminated motherboard to mitigate surface discharge at surface terminal (PTH/SMT) triple junctions.

Abstract: Aspects of an efficient compensation network for reducing reactive power in a wireless power transfer (WPT) system are disclosed. The compensation network comprises a series/series (S/S) constant current (CC) source, a reactive power compensation capacitor, and a constant current (CC)-to-constant voltage (CV) network. In an example, the S/S CC source comprises a first capacitor connected in series with a first inductor on a primary side of a transformer and a second inductor on a secondary side of the transformer. The S/S CC source converts an input voltage signal of the WPT system into a constant alternating current (AC) current signal. In an example, the CC-to-CV network comprises at least a third capacitor and a third inductor. The CC-to-CV network converts the constant AC current signal into a constant AC voltage signal.

Abstract: An inductor having a coaxial structure is described. In one example, the structure of the single-turn inductor can include a conductor, an insulation layer, a shielding layer, and a magnetic core. An air duct can be located between the shielding layer and the magnetic core. The shielding layer and the magnetic core can both be connected to a ground. In one example, the single-turn inductor can include a single-layer termination structure formed on terminations of the shielding layer. In another example, the single-turn inductor can include a double-layer termination structure formed on terminations of the shielding layer. Displacement current in the single-turn inductor can be reduced using, for example, lumped equivalent circuit models, a semi-conductive shielding layer model, or a resistive layer and conductive shielding layer model.

Abstract: Various examples of power converters including Integrated Capacitor Blocked Transistor (ICBT) cells and methods of control of power converters having ICBT cells are described. In one example, a power converter includes an upper arm including a plurality of upper ICBT cells connected in series to form a series connection path and a lower arm including a plurality of lower ICBT cells connected in series in the series connection path. A controller can be configured to provide a control signal pair to each of the upper ICBT cells and a complementary control signal pair to each of the lower ICBT cells to control the converter output. A capacitor voltage controller can be configured to balance a voltage potential among ICBT capacitors in at least one of the upper arm and the lower arm.

Abstract: Direct-current-to-direct-current (DC-DC) power converters that include two or more multi-quadrant, multi-level, DC-DC, switching converter subcircuits, connected in parallel at respective input and output sides, so as to provide a multi-channel, multi-quadrant, multi-level configuration, are disclosed. The DC-DC power converters further include a control circuit configured to control the switching converter subcircuits so that corresponding switching semiconductors in each of the switching converter subcircuits are switched in an interleaved manner. In some embodiments, each of the switching converter subcircuits is a three-level, neutral-point-clamped, four-quadrant DC-DC converter circuit. In other embodiments, each of the switching converter subcircuits is a three-level, neutral-point-clamped, two-quadrant DC-DC converter circuit. In any of these embodiments, a filter capacitor may be connected between across a pair of output terminals at the output sides of the switching converter subcircuits.

Abstract: A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.

Abstract: Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.

Abstract: A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.

Abstract: Aspects of hybrid-current-mode switching-cycle control are described. In one embodiment, a peak current mode is selected to control a switching power cell. The switching power cell is in an arm of a phase leg of a modular multilevel converter. The phase leg includes an upper arm and a lower arm, and the switching power cell includes a capacitor and at least one switch. At least one switch control signal switches the switching power cell according to a peak current mode based on at least one arm current boundary crossing identified for the arm.

Abstract: Aspects of non-linear droop control are described herein. In one embodiment, a system includes a first power converter or source configured to provide power to a bus, a second power converter or source configured to provide power to the bus, and a load electrically coupled to the bus. The system also includes a controller configured to adjust a droop resistance associated with the first power source according to a continuous non-linear function based on an amount of current supplied to the load by the first power source. The system can also include a second controller configured to adjust a droop resistance associated with the second power source according to the continuous non-linear function (or another continuous non-linear function). The use of the continuous non-linear functions achieves tighter voltage regulation particularly at lower loads and better load sharing at higher loads.

Abstract: A multi-phase power converter includes two or more multi-phase, bi-directional, multi-level, switching power converter subcircuits, connected in parallel at respective AC and DC sides, so as to provide a multi-channel, bi-directional, multi-level configuration. The AC sides of the switching converter subcircuits are directly coupled to one another and to a multi-phase AC input via series interface reactors, and the DC sides of the switching converter subcircuits are directly connected to one another and to a common split-capacitor bank at each level of the multi-level outputs of the switching converter subcircuits. A control circuit is configured to selectively control one or more switching semiconductor devices in each of the switching converter subcircuits.

Abstract: Critical-mode soft-switching techniques for a power converter are described. In one example, a power converter includes a bidirectional converter electrically coupled between an alternating current (AC) power system and a direct current (DC) power system, where the bidirectional converter includes a number of phase legs. The power converter can also include a control system configured, during a portion of a line cycle of the AC power system, to clamp a first phase leg of the converter from switching and operate second and third phase legs of the converter independently in either critical conduction mode (CRM) or in discontinuous conduction mode (DCM).

Abstract: In one example, a power converter includes a modular multilevel converter (MMC) electrically coupled between a first power system and a second power system. The MMC includes an arrangement of switching submodules, and the switching submodules include an arrangement of switching power transistors and capacitors. The MMC also includes a controller configured to inject a common mode frequency signal into a circulating current control loop. The circulating current control loop is relied upon to reduce at least one low frequency component in power used for charging the capacitors in the switching submodules. By injecting the common mode frequency signal into the circulating current control loop, the switching submodules can be switched at higher frequencies, the capacitances of the capacitors in the MMC can be reduced, and the power density of the MMC can be increased.

Abstract: In one example, a power converter includes a modular multilevel converter (MMC) electrically coupled between a first power system and a second power system. The MMC includes an arrangement of switching submodules, and the switching submodules include an arrangement of switching power transistors and capacitors. The MMC also includes a controller configured to inject a common mode frequency signal into a circulating current control loop. The circulating current control loop is relied upon to reduce at least one low frequency component in power used for charging the capacitors in the switching submodules. By injecting the common mode frequency signal into the circulating current control loop, the switching submodules can be switched at higher frequencies, the capacitances of the capacitors in the MMC can be reduced, and the power density of the MMC can be increased.

Abstract: In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.

Abstract: In a modular multi-level power converter, additional switching states are interleaved between main switching states that control output voltage or waveform. The additional switching states provide current from a DC-link to charge capacitors in respective modules or cells to an offset voltage from which the capacitor voltages are controlled toward a reference voltage during each switching cycle rather than being allowed to build up over a period of an output waveform of variable line frequency, possibly including zero frequency. Since the switching cycle is much shorter than the duration of a line frequency cycle and the capacitor voltages are balanced during each switching cycle, output voltage ripple can be limited as desired with a capacitor of much smaller value and size than would otherwise be required.

Abstract: Aspects of interface converter common mode (CM) voltage control are described. In one embodiment, a bi-directional alternating current (AC) to direct current (DC) interface converter system includes an AC-DC converter between an AC power system and an interface link and a DC-DC converter between a DC power system and the interface link. The AC-DC converter can include a bridge converter having power switches, such as field-insulated gate bipolar transistors (IGBTs) or another power semiconductor device. The system also includes a control loop that generates control signals for switching the power switches of the AC-DC converter, and a CM control loop that injects a CM control signal into the control loop. By injecting the CM control signal into the control loop, low-frequency ripple and asymmetry between positive and negative output voltages of the DC power system can be reduced.

Abstract: A rectifier is configured to convert a three-phase AC voltage to a 12-pulse DC voltage, drawing a 12-pulse AC current from a three-phase network. The rectifier may comprise a first interleaved phase-leg, a second interleaved phase-leg, and/or a third interleaved phase-leg. Respective interleaved phase-legs may comprise positive portions configured to conduct positive current from a transformer towards a load, and negative portions configured to conduct negative current from the load back to the transformer. The rectifier may be configured to sequentially cycle respective interleaved phase-legs into positive and/or negative 120 conducting states over a 360 degree cycle to output the 12-pulse DC voltage. For example, during a first 120 degree conducting state a positive portion of the first interleaved phase-leg may conduct positive current towards the load, while a negative portion of a different phase-leg may conduct negative current back to the transformer.

Abstract: Aspects of non-linear droop control are described herein. In one embodiment, a system includes a first power converter or source configured to provide power to a bus, a second power converter or source configured to provide power to the bus, and a load electrically coupled to the bus. The system also includes a controller configured to adjust a droop resistance associated with the first power source according to a continuous non-linear function based on an amount of current supplied to the load by the first power source. The system can also include a second controller configured to adjust a droop resistance associated with the second power source according to the continuous non-linear function (or another continuous non-linear function). The use of the continuous non-linear functions achieves tighter voltage regulation particularly at lower loads and better load sharing at higher loads.

Abstract: A converter for connecting a voltage source to a load includes a plurality of ICBT (integrated capacitor blocked transistor) cells configured as switches and connected in series to form a series connection path, a main capacitor connected across the series connection path, and a controller. Each ICBT cell includes a main transistor disposed in the series connection path and a series connected auxiliary transistor and auxiliary capacitor coupled in parallel with the main transistor. The controller is operable to develop a voltage across the main capacitor which exceeds a voltage rating of the ICBT cells, by switching the ICBT cells so as to commutate current within the individual ICBT cells without the ICBT cells providing active power to the load so that power flow is from the voltage source, to the main capacitor, to the load and not through the auxiliary transistors and the auxiliary capacitors.