Abstract: The invention relates to a semiconductor device (100) with a semiconductor body (10) comprising at least one semiconductor element (H) with an active area (A) and a coil (20) coupled to said element (H). The coil (20) and a further coil (21) jointly form a transformer (F). The semiconductor body (10) is secured to a carrier plate (30) which comprises an electrically insulating material and is covered with a conductor track (21). According to the invention, the further coil (21) is positioned on the carrier plate (30) and is formed by the conductor track (21) and electrically separated from the coil (20). In this way, a-device (100) is obtained which is easier to manufacture than the known device. Moreover, the communication between the element (H) and the outside world does not involve an electrical coupling and hence, for example, bonding wires, are not necessary. The invention is particularly advantageous for a (discrete) bipolar transistor, which can suitably be used for surface mounting.

Abstract: A method of manufacturing a semiconductor device comprising a poly-emitter transistor (1) and a capacitor (2). A base electrode (14), a first electrode (16, 37) and an emitter window (18) are formed at the same time in a first polysilicon layer (13) covered with an insulating layer (25). Subsequently, the side walls of the electrodes (20, 39) and the wall (23) of the emitter window are covered at the same time with insulating spacers (22, 44) by depositing a layer of an insulating material, followed by an anisotropic etching process. The base (8) of the transistor is formed by ion implantation. The emitter (9) is formed by diffusion, from an emitter electrode (30) formed in a second polysilicon layer. Preferably, the first electrode of the capacitor consists of mutually connected strips (37).

Abstract: A method of producing a Schottky varicap (25) including: (a) providing an epitaxial layer (12) on a semiconductor substrate (1); (b) providing an insulating layer including an oxide layer and a nitride layer on a predetermined area of the surface of the epitaxial layer (12); (c) depositing a polysilicon layer (6); (d) applying a first high temperature step to diffuse a guard ring (10) around the first predetermined area; (e) removing a predetermined portion of the polysilicon layer (6) to expose the first silicon nitride film (5); (f) implanting atoms through at least the first oxide film (4) to provide a predetermined varicap doping profile; (g) applying a second high temperature step to anneal and activate the varicap doping profile; (h) removing the first oxide film (4) to provide an exposed area; (i) providing a Schottky electrode (17) on the exposed area.

Abstract: A method of manufacturing a hybrid integrated circuit comprising a semiconductor element (1) and a piezoelectric filter (2), which are situated next to each other and connected to a carrier substrate (3). The semiconductor element comprises semiconductor regions (5, 6) which are formed in a silicon layer (13, 28); the piezoelectric filter comprises an acoustic resonator (8, 9, 10) which is situated on an acoustic reflector layer (7), which acoustic resonator comprises a layer of piezoelectric material (8), a first electrode (9) situated between the layer of piezoelectric material and the acoustic reflector layer, and a second electrode (10) which is situated on the opposite side of the piezoelectric layer and faces the first electrode. In the method, the semiconductor element is formed on the first side (11) of a silicon wafer (12, 25).

Abstract: A method of manufacturing a semiconductor device with an epitaxial semiconductor zone, whereby a first layer of insulating material, a first layer of non-monocrystalline silicon, and a second layer of insulating material are provided in that order on a surface of a silicon wafer, a window with a steep wall is etched through the second layer of insulating material and the first layer of non-monocrystalline silicon, the wall of the window is provided with a protective layer, the first insulating layer is selectively etched away within the window and below an edge of the first layer of non-monocrystalline silicon adjoining the window such that both the edge of the first layer of non-monocrystalline silicon itself and the surface of the wafer become exposed within the window and below said edge, semiconductor material is selectively deposited such that the epitaxial semiconductor zone is formed on the exposed surface of the wafer, and an edge of polycrystalline semiconductor material connected to the epitaxi

Abstract: A method of manufacturing a hybrid integrated circuit comprising a semiconductor element (1) and a piezoelectric filter (2), which are situated next to each other and connected to a carrier substrate (3). The semiconductor element comprises semiconductor regions (5, 6) which are formed in a silicon layer (13, 28); the piezoelectric filter comprises an acoustic resonator (8, 9, 10) which is situated on an acoustic reflector layer (7), which acoustic resonator comprises a layer of piezoelectric material (8), a first electrode (9) situated between the layer of piezoelectric material and the acoustic reflector layer, and a second electrode (10) which is situated on the opposite side of the piezoelectric layer and faces the first electrode. In the method, the semiconductor element is formed on the first side (11) of a silicon wafer (12, 25).

Abstract: A simple method of manufacturing a magnetic head having a head face and including a planar magnetic coil (7) which extends parallel to the head face. According to the method, the magnetic coil is formed at a first side of a first substrate (1). Thereafter, the first substrate provided with the magnetic coil is adhered with its first side to a side of a second substrate, whereafter material of the first substrate is removed from a second side of the first substrate (9), the second side being turned away from the first side, in order to form the head face, in such a manner that the magnetic coil is situated near to the head face.

Abstract: The invention relates to a semiconductor device comprising a bipolar transistor having a collector (1), a base (2) and an emitter (3) at its active area (A). The semiconductor body (10) of the device is covered with an insulating layer (20). At least a part of a base connection conductor (5) and an emitter connection conductor (6) extend over the insulating layer (20) and lead to a base connection area (8) and an emitter connection area (9), respectively. The known transistor is characterized by poor gain, particularly at high frequencies and at high power.

Abstract: The invention relates to an essentially discrete semiconductor device comprising a semiconductor body (10) having a first, preferably bipolar, transistor (T1) with a first region (1) forming a collector (1) of T1, and a second, preferably also bipolar, transistor (T2) with a second region (2) forming a collector (2) of T2, which transistors (T1, T2) are in a cascode configuration wherein the collector (1) of T1 is connected to the emitter (4) of T2. Such a device cannot suitably be used in a base station for mobile communication.

Abstract: A semiconductor device (1) with an operating frequency above 50 MHz comprises a body (2) composed of a soft ferrite material, which body (2) has a surface (3) to which a semiconductor element (4), a pattern of conductors (5,6) and a passive element in the form of a planar inductor (7) are fastened by means of a layer (8) of adhesive. In order to reduce the manufacturing costs of the semiconductor device without adversely affecting the performance of the semiconductor device performance, a soft ferrite material is applied having a ferromagnetic resonance frequency smaller than the operating frequency of the semiconductor device.

Abstract: A method of producing a Schottky varicap (25) including:

Abstract: A method of manufacturing a semiconductor device comprising semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700° C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400° C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500° C.

Abstract: A method of manufacturing a piezoelectric filter with a resonator comprising a layer of a piezoelectric material (1) which is provided with an electrode (2,3) on either side, which resonator is situated on an acoustic reflector layer (4) formed on a surface (6) of a carrier substrate (7). In the method, the layer of piezoelectric material (1) is provided on a surface (8) of an auxiliary substrate (9), after which a first electrode (2) is formed on the layer of piezoelectric material (1). The acoustic reflector layer (4) is provided on and next to the first electrode (2), and the structure thus formed is secured with the side facing away from the auxiliary substrate (9) on the carrier substrate (7). The auxiliary substrate (9) is removed and a second electrode (3) situated opposite the first electrode (2) is provided.

Abstract: A thin film semiconductor device includes a glass supporting body having thereon an insulating substrate which is attached thereto by a layer of adhesive material. On the surface of the substrate facing the supporting body is a layer of semiconductor material which includes therein a semiconductor element, such surface further having thereon a metalization pattern of conductor tracks. An insulating layer is additionally provided between the metalization pattern and the adhesive layer, and has a dielectric constant &egr;r below 3 and a thickness in the range of approximately 20 &mgr;m to 60 &mgr;m. By virtue of such additional layer, parasitic capacitanees between the metalization pattern and an envelope in which the device is included or a printed circuit board on which the device is mounted are reduced substantially, thereby reducing the power consumption of the device.

Abstract: A method of manufacturing a semiconductor device which starts with a semiconductor wafer (1) which is provided with a layer of semiconductor material (4) lying on an insulating layer (3) at a first side (2). Semiconductor elements (5) and conductor tracks (14) are formed on this first side (2) of the semiconductor wafer (1). Then the semiconductor wafer (1) is fastened with this first side (2) to a support wafer (15), and material (18) is removed from the semiconductor wafer (1) from its other, second side (17) until the insulating layer (3) has been exposed. The method starts with a semiconductor wafer (1) whose insulating layer (3) is an insulating as well as a passivating layer. The semiconductor device must be provided with a usual passivating layer after its manufacture in order to protect it against moisture and other influences. In the method described here, such a passivating layer is present already before the manufacture of the semiconductor device starts.

Abstract: A device for processing electromagnetic waves in the microwave range, with a body provided with a circuit element which is electrically connected to a strip-type transmission line which comprises conductor tracks, said body being mechanically connected to an insulating substrate via contact bodies. The transmission line is formed by conductor tracks which lie on mutually facing surfaces of the body and the insulating substrate, respectively. The transmission line in the device is present between the body and the insulating substrate, the contact bodies providing a separation between the conductor tracks. Thus, it is not necessary then to use a second side of the body remote from the insulating substrate for the manufacture of transmission lines.

Abstract: A semiconductor device provided with a semiconductor substrate with a bipolar transistor having a collector region of a first conductivity type, a base region adjoining the collector region and of a second conductivity type opposed to the first, and an elongate emitter region of the first conductivity type adjoining the base region; the collector region, the base region, and the emitter region being provided with conductor tracks which are connected to conductive connection surfaces. The conductor track on the elongate emitter region of the semiconductor device has a connection to a connection surface for a further electrical connection at each of the two ends of the emitter region. The emitter region may be made longer in this manner because the length of the emitter region is effectively halved by the connections at the two ends. Consequently, charge carriers need be transported over no more than at most half the emitter length.

Abstract: The invention relates to a method of manufacturing a semiconductor device with a pn junction, whereby an epitaxial layer (2) with a first zone (3) of a first conductivity type and with a second zone (4) of a second conductivity type opposed to the first is provided on a silicon substrate (1), a pn junction (5) being formed between the second and first zones (3, 4, respectively). According to the invention, the method is characterized in that the epitaxial layer (2) is provided by means of a CVD process at a temperature below 800.degree. C., the epitaxial layer (2) being provided in that first the first zone (3) and then the second zone (4) are epitaxially provided on the substrate (1), while no heat treatments at temperatures above 800.degree. C. take place after the epitaxial layer (2) has been provided.

Abstract: A semiconductor device comprises a substrate (1) with a plane surface (4) on which a layer structure (2) is formed in a number of layers (5, 7, 9, 13, 15, 17). The side of the substrate on which the layer structure was formed is fastened to a plane support body (18) by means of a glue layer (19) which encompasses spacer elements (20). These spacer elements are fastened to the surface of the substrate and all have the same height measured from the surface (4). In fastening the substrate to the support body, glue is provided and the substrate is pressed onto the support body so that the pressure is evenly distributed over the spacer elements.

Abstract: A method of manufacturing a semiconductor device which starts with a semiconductor wafer which is provided with a layer of semiconductor material lying on an insulating layer at a first side. Semiconductor elements and conductor tracks are formed on this first side of the semiconductor wafer. Then the semiconductor wafer is fastened with this first side to a support wafer, and material is removed from the semiconductor wafer from its other, second side until the insulating layer has been exposed. The method starts with a semiconductor wafer whose insulating layer is an insulating as well as a passivating layer. The semiconductor device must be provided with a usual passivating layer after its manufacture in order to protect it against moisture and other influences. In the method described here, such a passivating layer is present already before the manufacture of the semiconductor device starts.