Patents by Inventor Ronald Eisele

Ronald Eisele has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190341341
    Abstract: A power module (10) having a leadframe (20), a power semiconductor (30) arranged on the leadframe (20), a base plate (40) for dispersing heat generated by the power semiconductor (30) and a potting compound (50) surrounding the leadframe (20) and the power semiconductor (30), that physically connects the power semiconductor (30) and/or the leadframe (20) to the base plate(40).
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Ronald Eisele, Frank Osterwald
  • Patent number: 10438924
    Abstract: A method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor module by sintering, the method comprising the steps of: applying a layer of unsintered sinter material to a predetermined bonding surface of the first component, arranging the second component on the surface layer of unsintered sinter material, attaching the second component to the first component by applying pressure and/or temperature on a locally delimited partial area within the predetermined bonding surface, processing the first and/or second component and/or other components of the power semiconductor module, and complete-area sintering of the sinter material.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: October 8, 2019
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Martin Becker, Ronald Eisele, Frank Osterwald, Jacek Rudzki, Holger Ulrich
  • Patent number: 10403566
    Abstract: A power module (10) having a leadframe (20), a power semiconductor (30) arranged on the leadframe (20), a base plate (40) for dispersing heat generated by the power semiconductor (30) and a potting compound (50) surrounding the leadframe (20) and the power semiconductor (30), that physically connects the power semiconductor (30) and/or the leadframe (20) to the base plate (40).
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: September 3, 2019
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Ronald Eisele, Frank Osterwald
  • Patent number: 10381283
    Abstract: The present invention discloses a power semiconductor module, comprising: a substrate; a semiconductor provided on a top side of the substrate; and a package formed on the semiconductor and the substrate, wherein the package has openings at a top side thereof, through which terminal contacts of the semiconductor and the substrate are exposed outside and accessible from outside.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: August 13, 2019
    Assignee: DANFOSS SILICON POWER GMBH
    Inventors: Frank Osterwald, Ronald Eisele, Holger Ulrich
  • Patent number: 10332858
    Abstract: An electronic sandwich structure which has at least a first and a second part to be joined, which are sintered together by means of a sintering layer. The sintering layer is formed as a substantially uninterrupted connecting layer, the density of which varies in such a way that at least one region of higher density and at least one region of lower density alternate with one another. A method for forming a sintering layer of an electronic sandwich structure, in which firstly a sintering material layer is applied substantially continuously to a first part to be joined as a connecting layer, this sintering material layer is subsequently dried and, finally, alternating regions of higher density and of lower density of the connecting layer are produced by sintering the first part to be joined with the sintering layer on a second part to be joined.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: June 25, 2019
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Martin Becker, Ronald Eisele, Jacek Rudzki, Frank Osterwald
  • Patent number: 10306800
    Abstract: The present invention discloses a cooling trough comprising an unflat surface, surrounding an opening of the cooling trough, configured with a height essentially decreasing inwardly. At least one supporting line, running around the opening of the cooling trough, is formed on the unflat surface. The at least one supporting line contacts a baseplate of a power module after the baseplate is attached to the unflat surface of the cooling trough. In addition, the present invention also discloses a cooler comprising the cooling trough and a power module assembly comprising the cooler.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: May 28, 2019
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Franke Wulf-Toke, Ronald Eisele, Reiner Hinken, Frank Osterwald, Klaus Olesen, Lars Paulsen
  • Publication number: 20180331065
    Abstract: A description is given of an electronic sandwich structure which has at least a first and a second part to be joined, which are sintered together by means of a sintering layer. The sintering layer is formed as a substantially uninterrupted connecting layer, the density of which varies in such a way that at least one region of higher density and at least one region of lower density alternate with one another. A description is also given of a method for forming a sintering layer of an electronic sandwich structure, in which firstly a sintering material layer is applied substantially continuously to a first part to be joined as a connecting layer, this sintering material layer is subsequently dried and, finally, alternating regions of higher density and of lower density of the connecting layer are produced by sintering the first part to be joined with the sintering layer on a second part to be joined.
    Type: Application
    Filed: October 30, 2015
    Publication date: November 15, 2018
    Inventors: Martin Becker, Ronald Eisele, Jacek Rudzki, Frank Osterwald
  • Publication number: 20180301354
    Abstract: A method for manufacturing a circuit carrier (100?) having a base plate (10), an organic insulating foil (20) arranged on the base plate (10) and a metal shaped body (30) arranged on the insulating foil (20), wherein the base plate (10), insulating foil (20) and metal shaped body (30) are connected to each other by applying a quasi-hydrostatic pressure acting from the top while maintaining an even insulating foil layer thickness.
    Type: Application
    Filed: April 26, 2016
    Publication date: October 18, 2018
    Inventors: Frank Osterwald, Aylin Bicakci, Ronald Eisele
  • Patent number: 10079219
    Abstract: A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal molded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal molded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal molded body.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: September 18, 2018
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Martin Becker, Ronald Eisele, Frank Osterwald, Jacek Rudzki
  • Publication number: 20180261518
    Abstract: A semiconductor module (10) contains a ceramic interconnect device (50) having at least one semiconductor component (20). The at least one semiconductor component (20) is covered by an encapsulating compound (30) which contains a cured inorganic cement and has a thermal expansion coefficient in the range of 2 to 10 ppm/K. The ceramic of the ceramic interconnect device (50) is selected from ceramics based on aluminum oxide, aluminum nitride or silicon nitride.
    Type: Application
    Filed: May 9, 2018
    Publication date: September 13, 2018
    Inventors: Ronald EISELE, Anton-Zoran MIRIC, Frank KRÜGER, Wolfgang SCHMITT
  • Publication number: 20180240776
    Abstract: A method for manufacturing semiconductor chips (2, 3) having arranged thereon metallic shaped bodies (6), having the following steps: arranging a plurality of metallic shaped bodies (6) on a processed semiconductor wafer while forming a layer arranged between the semiconductor wafer and the metallic shaped bodies (6), exhibiting a first connection material (4) and a second connection material (5), and processing the first connection material (4) for connecting the metallic shaped bodies (6) to the semiconductor wafer without processing the second connecting material (5), wherein the semiconductor chips (2, 3) are separated either prior to arranging the metallic shaped bodies (6) on the semiconductor wafer or after processing the first connection material (4).
    Type: Application
    Filed: July 26, 2016
    Publication date: August 23, 2018
    Inventors: Frank Osterwald, Martin Becker, Holger Ulrich, Ronald Eisele, Jacek Rudzki
  • Publication number: 20180218957
    Abstract: The present invention discloses a power semiconductor module, comprising: a substrate; a semiconductor provided on a top side of the substrate; and a package formed on the semiconductor and the substrate, wherein the package has openings at a top side thereof, through which terminal contacts of the semiconductor and the substrate are exposed outside and accessible from outside.
    Type: Application
    Filed: July 4, 2016
    Publication date: August 2, 2018
    Inventors: Frank Osterwald, Ronald Eisele, Holger Ulrich
  • Publication number: 20170365541
    Abstract: A power module (10) having a leadframe (20), a power semiconductor (30) arranged on the leadframe (20), a base plate (40) for dispersing heat generated by the power semiconductor (30) and a potting compound (50) surrounding the leadframe (20) and the power semiconductor (30), that physically connects the power semiconductor (30) and/or the leadframe (20) to the base plate (40).
    Type: Application
    Filed: January 29, 2016
    Publication date: December 21, 2017
    Inventors: Ronald EISELE, Frank OSTERWALD
  • Publication number: 20170338193
    Abstract: A description is given of a power semiconductor module 10 which can be transferred from a normal operating mode to an explosion-free robust short-circuit failure mode. Said power semiconductor module 10 comprises a power semiconductor 1 having metallizations 3 which form potential areas and are separated by insulations and passivations on the top side 2 of said power semiconductor. Furthermore, an electrically conductive connecting layer is provided, on which at least one metal shaped body 4 which has a low lateral electrical resistance and is significantly thicker than the connecting layer is arranged, said at least one metal shaped body being applied by sintering of the connecting layer such that said metal shaped body is cohesively connected to the respective potential area.
    Type: Application
    Filed: October 14, 2015
    Publication date: November 23, 2017
    Inventors: Josef Lutz, Ronald Eisele, Jacek Rudzki, Martin Becker, Mathias Kock, Frank Osterwald
  • Publication number: 20170332515
    Abstract: The present invention discloses a cooling trough comprising an unflat surface, surrounding an opening of the cooling trough, configured with a height essentially decreasing inwardly. At least one supporting line, running around the opening of the cooling trough, is formed on the unflat surface. The at least one supporting line contacts a baseplate of a power module after the baseplate is attached to the unflat surface of the cooling trough. In addition, the present invention also discloses a cooler comprising the cooling trough and a power module assembly comprising the cooler.
    Type: Application
    Filed: November 19, 2015
    Publication date: November 16, 2017
    Inventors: Franke Wulf-Toke, Ronald Eisele, Reiner Hinken, Frank Osterwald, Klaus Olesen, Lars Paulsen
  • Publication number: 20170317051
    Abstract: A method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor module by sintering, the method comprising the steps of: applying a layer of unsintered sinter material to a predetermined bonding surface of the first component, arranging the second component on the surface layer of unsintered sinter material, attaching the second component to the first component by applying pressure and/or temperature on a locally delimited partial area within the predetermined bonding surface, processing the first and/or second component and/or other components of the power semiconductor module, and complete-area sintering of the sinter material.
    Type: Application
    Filed: April 28, 2017
    Publication date: November 2, 2017
    Inventors: Martin Becker, Ronald Eisele, Frank Osterwald, Jacek Rudzki, Holger Ulrich
  • Publication number: 20170317049
    Abstract: A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal moulded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal moulded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal moulded body.
    Type: Application
    Filed: October 12, 2015
    Publication date: November 2, 2017
    Inventors: Martin Becker, Ronald Eisele, Frank Osterwald, Jacek Rudzki
  • Patent number: 9786627
    Abstract: The invention relates to a method for connecting a power semi-conductor chip having upper-sided potential surfaces to thick wires or strips, consisting of the following steps: Providing a metal molded body corresponding to the shape of the upper-sided potential surfaces, applying a connecting layer to the upper-sided potential surfaces or to the metal molded bodies, and applying the metal molded bodies and adding a material fit, electrically conductive compound to the potential surfaces prior to the joining of the thick wire bonds to the non-added upper side of the molded body.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: October 10, 2017
    Assignee: Danfoss Silicon Power GmbH
    Inventors: Martin Becker, Ronald Eisele, Frank Osterwald, Jacek Rudzki
  • Publication number: 20170229418
    Abstract: Sintering device (10) for sintering at least one electronic assembly (BG), having a lower die (20) and an upper die (30) which is slidable towards the lower die (20), or a lower die (20) which is slidable towards the upper die (30), wherein the lower die (20) forms a support for the assembly (BG) to be sintered and the upper die (30) comprises a receptacle which receives a pressure pad (32) for exerting pressure directed towards the lower die (20) and which comprises a delimitation wall (34) which laterally surrounds the pressure pad (32), and wherein the delimitation wall (34) has an outer delimitation wall (34a) and an inner delimitation wall (34b) which is surrounded in an adjacent manner by the outer delimitation wall (34a), and wherein the inner delimitation wall (34b) is mounted so as to be slidable towards the outer delimitation wall (34a) and, when pressure in the direction of the upper die (30) is exerted on the pressure pad (32), is mounted so as to be slid in the direction of the lower die (20), wh
    Type: Application
    Filed: September 9, 2015
    Publication date: August 10, 2017
    Inventors: Frank Osterwald, Ronald Eisele, Martin Becker, Lars Paulsen, Jacek Rudzki, Holger Ulrich
  • Publication number: 20170229424
    Abstract: Process for producing an electronic subassembly by low-temperature pressure sintering, comprising the following steps: arranging an electronic component on a circuit carrier having a conductor track, connecting the electronic component to the circuit carrier by the low-temperature pressure sintering of a joining material which connects the electronic component to the circuit carrier, characterized in that, to avoid the oxidation of the electronic component or of the conductor track, the low-temperature pressure sintering is carried out in a low-oxygen atmosphere having a relative oxygen content of 0.005 to 0.3%.
    Type: Application
    Filed: September 21, 2015
    Publication date: August 10, 2017
    Inventors: Ronald Eisele, Holger Ulrich