Patents by Inventor Ronald Eugene Reedy
Ronald Eugene Reedy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200043946Abstract: Structures and fabrication methods for transistors having low parasitic capacitance, the transistors including an insulating low dielectric constant first or second handle wafer. In one embodiment, a Single Layer Transfer technique is used to position an insulating LDC handle wafer proximate the metal interconnect layers of an SOI transistor/metal layer stack in lieu of the silicon substrate of conventional designs. In another embodiment, a Double Layer Transfer technique is used to replace the silicon substrate of prior art structures with an insulating LDC substrate. In some embodiments, the insulating LDC handle wafer includes at least one air cavity, which reduces the effective dielectric constant of material surrounding an RF FET. An insulating LDC handle wafer reduces insertion loss and non-linearity, increases isolation, provides for more ideal voltage division of stacked transistors, enables a higher Q factor due to lower coupling losses, and otherwise mitigates various parasitic effects.Type: ApplicationFiled: January 9, 2019Publication date: February 6, 2020Inventors: Abhijeet Paul, Simon Edward Willard, Alain Duvallet, Ronald Eugene Reedy
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Publication number: 20200027898Abstract: A FET IC structure made using a back-side access process that mitigates or eliminates thermal conductivity problems. In some embodiments, electrically-isolated thermal paths are formed adjacent the FET and configured to conduct heat laterally away from the FET to generally orthogonal thermal pathways, and thence to thermal pads externally accessible at the “top” of the completed IC. In some embodiments having a thermally-conductive handle wafer, electrically-isolated thermal paths are formed adjacent a FET and configured to conduct heat laterally away from the FET. Thermal vias are formed sufficiently so as to be in thermal contact with the handle wafer and with the conventional metallization layers of the device superstructure, at least one of which is in thermal contact with the lateral thermal paths. In some embodiments, the lateral thermal paths may use dummy gates configured to conduct heat laterally away from a FET to generally orthogonal thermal pathways.Type: ApplicationFiled: July 19, 2018Publication date: January 23, 2020Inventors: Abhijeet Paul, Richard James Dowling, Hiroshi Yamada, Alain Duvallet, Ronald Eugene Reedy
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Publication number: 20190123735Abstract: Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.Type: ApplicationFiled: October 10, 2018Publication date: April 25, 2019Inventors: Ronald Eugene Reedy, Dan William Nobbe, Tero Tapio Ranta, Cheryl V. Liss, David Kovac
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Publication number: 20190113564Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.Type: ApplicationFiled: November 30, 2018Publication date: April 18, 2019Inventors: Dan William Nobbe, Ronald Eugene Reedy, Peter Bacon, James S. Cable
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Integrated Circuits with Components on Both Sides of a Selected Substrate And Methods of Fabrication
Publication number: 20190115367Abstract: Novel integrated circuits (SOI ICs), and methods for making and mounting the ICs are disclosed. In one embodiment, an IC comprises a first circuit layer of the IC formed from an active layer of an SOI wafer. The first circuit layer is coupled to a first surface of buffer layer, and a second surface of the buffer layer is coupled to a selected substrate comprising an insulating material. The selected substrate may be selected, without limitation, from the following types: sapphire, quartz, silicon dioxide glass, piezoelectric materials, and ceramics. A second circuit layer of the IC are formed, coupled to a second surface of the selected substrate. In one embodiment of a mounted IC, the first circuit layer is coupled to contact pads on a package substrate via solder bumps or copper pillars. The second circuit layer is coupled to contact pads on the package substrate via wire bonds.Type: ApplicationFiled: April 9, 2018Publication date: April 18, 2019Inventors: James S. Cable, Anthony Mark Miscione, Ronald Eugene Reedy -
Publication number: 20190096772Abstract: An extension of conventional IC fabrication processes to include some of the concepts of flip-chip assemblies while producing a final “non-flip chip” circuit structure suitable for conventional packaging or for direct usage by customers. Multiple IC dies are fabricated on a semiconductor wafer in a conventional fashion, solder bumped or the like, and singulated. The singulated dies, which may be of different sizes and functionality, are then flip-chip assembled onto a single tile substrate of thin-film material which has been patterned with vias, peripheral connection pads, and one or more ground planes. Once dies are flip-chip mounted to the thin-film tile, all of the dies on the entire tile may be probed using automated testing equipment. Sets of dies of different functionality may be tested as a system or subsystem. Once test probing is complete, the dies (or sets of dies) and tile are singulated into die/tile assemblies.Type: ApplicationFiled: September 24, 2018Publication date: March 28, 2019Inventors: Mark Moffat, Andrew Christie, Duncan Pilgrim, Ronald Eugene Reedy
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Patent number: 10184973Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.Type: GrantFiled: December 1, 2017Date of Patent: January 22, 2019Assignee: pSemi CorporationInventors: Dan William Nobbe, Ronald Eugene Reedy, Peter Bacon, James S. Cable
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Patent number: 10158345Abstract: Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.Type: GrantFiled: August 28, 2017Date of Patent: December 18, 2018Assignee: pSemi CorporationInventors: Ronald Eugene Reedy, Dan William Nobbe, Tero Tapio Ranta, Cheryl V. Liss, David Kovac
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Publication number: 20180164366Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.Type: ApplicationFiled: December 1, 2017Publication date: June 14, 2018Inventors: Dan William Nobbe, Ronald Eugene Reedy, Peter Bacon, James S. Cable
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Integrated circuits with components on both sides of a selected substrate and methods of fabrication
Patent number: 9947688Abstract: Novel integrated circuits (SOI ICs), and methods for making and mounting the ICs are disclosed. In one embodiment, an IC comprises a first circuit layer of the IC formed from an active layer of an SOI wafer. The first circuit layer is coupled to a first surface of buffer layer, and a second surface of the buffer layer is coupled to a selected substrate comprising an insulating material. The selected substrate may be selected, without limitation, from the following types: sapphire, quartz, silicon dioxide glass, piezoelectric materials, and ceramics. A second circuit layer of the IC are formed, coupled to a second surface of the selected substrate. In one embodiment of a mounted IC, the first circuit layer is coupled to contact pads on a package substrate via solder bumps or copper pillars. The second circuit layer is coupled to contact pads on the package substrate via wire bonds.Type: GrantFiled: June 20, 2012Date of Patent: April 17, 2018Assignee: pSemi CorporationInventors: James S. Cable, Anthony Mark Miscione, Ronald Eugene Reedy -
Publication number: 20180097509Abstract: Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.Type: ApplicationFiled: August 28, 2017Publication date: April 5, 2018Inventors: Ronald Eugene Reedy, Dan William Nobbe, Tero Tapio Ranta, Cheryl V. Liss, David Kovac
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Patent number: 9864000Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.Type: GrantFiled: November 2, 2016Date of Patent: January 9, 2018Assignee: Peregrine Semiconductor CorporationInventors: Dan William Nobbe, Ronald Eugene Reedy, Peter Bacon, James S. Cable
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Patent number: 9843311Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.Type: GrantFiled: October 5, 2016Date of Patent: December 12, 2017Assignee: Peregrine Semiconductor CorporationInventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy
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Patent number: 9806694Abstract: Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.Type: GrantFiled: October 14, 2015Date of Patent: October 31, 2017Assignee: Peregrine Semiconductor CorporationInventors: Ronald Eugene Reedy, Dan William Nobbe, Tero Tapio Ranta, Cheryl V. Liss, David Kovac
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Publication number: 20170146591Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.Type: ApplicationFiled: November 2, 2016Publication date: May 25, 2017Inventors: Dan William Nobbe, Ronald Eugene Reedy, Peter Bacon, James S. Cable
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Publication number: 20170117883Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.Type: ApplicationFiled: October 5, 2016Publication date: April 27, 2017Inventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy
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Patent number: 9484897Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.Type: GrantFiled: March 18, 2015Date of Patent: November 1, 2016Assignee: Peregrine Semiconductor CorporationInventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy
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Publication number: 20160277008Abstract: Systems, methods, and apparatus for use in biasing and driving high voltage semiconductor devices using only low voltage transistors are described. The apparatus and method are adapted to control multiple high voltage semiconductor devices to enable high voltage power control, such as power amplifiers, power management and conversion and other applications wherein a first voltage is large compared to the maximum voltage handling of the low voltage control transistors. A DC/DC power conversion implementation from high input voltage to low output voltage using a novel level shifter which uses only low voltage transistors is also provided. Also presented is a level shifter in which floating nodes and high voltage capacitive coupling and control enable the high voltage control with low voltage transistors.Type: ApplicationFiled: March 18, 2015Publication date: September 22, 2016Inventors: Merlin Green, Mark L. Burgener, James W. Swonger, Buddhika Abesingha, Ronald Eugene Reedy
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Publication number: 20160191019Abstract: Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.Type: ApplicationFiled: October 14, 2015Publication date: June 30, 2016Inventors: Ronald Eugene Reedy, Dan William Nobbe, Tero Tapio Ranta, Cheryl V. Liss, David Kovac
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Patent number: 9197194Abstract: Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.Type: GrantFiled: August 27, 2012Date of Patent: November 24, 2015Assignee: Peregrine Semiconductor CorporationInventors: Ronald Eugene Reedy, Dan William Nobbe, Tero Tapio Ranta, Cheryl V. Liss, David Kovac