Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract: An apparatus and method for adjusting the clock delay in systems with multiple integrated circuits has a controller, a programmable clock generator and a plurality of integrated circuits, each integrated circuit including a data flip-flop, a programmable delay and a clock-fanout tree, wherein the clock delay in the integrated circuits is adjusted to match the inherent delay in the integrated circuit having the longest inherent delay.

Abstract: An apparatus and method for adjusting the clock delay in systems with multiple integrated circuits has a controller, a programmable clock generator and a plurality of integrated circuits, each integrated circuit including a data flip-flop, a programmable delay and a clock-fanout tree, wherein the clock delay in the integrated circuits is adjusted to match the inherent delay in the integrated circuit having the longest inherent delay.

Abstract: A multilayer package includes a plurality of interconnected large-layer-count (LLC) substrates. The LLC substrates each include conductive pads on the top and bottom surfaces of the substrate, a via in the substrate including conductive material to contact the pads on the top and bottom surfaces, and a post on a pad over the via. The posts of the substrates confront and abut each other, and are electrically bonded together. A non-flowable adhesive film mechanically bonds the LLC substrates, and has an aperture receiving the posts of the substrates.

Abstract: A process of laminating a large-layer-count (LLC) substrates includes formation of first and second vias through respective substrates. A conductive path is formed through each of the respective vias, and posts are formed on the respective vias, electrically connected to the respective conductive path. A non-flowable adhesive layer having an aperture is provided between the LLC substrates so that the posts confront each other through the aperture. The LLC substrates are pressed together through the non-flowable adhesive layer to mechanically bond them together, and so that the posts abut each other. Simultaneously, the posts are electrically bonded to each other in the aperture.

Abstract: A connecting device is disclosed for electrically and mechanically linking multiple circuit boards arranged in two perpendicular stacks. The connecting device includes two identical connectors, each with a plurality of outwardly extended electrical socket contacts, and a pair of opposite, electrically insulative shoulders projected outwardly beyond the socket contacts. Electrical pin contacts are recessed into the shoulders. The pair of connectors can be engaged when in facing relation, with one of them rotated 90.degree. relative to the other. As the connectors are moved toward engagement, each shoulder of each connector enters into a nesting relation between the opposed shoulders of the other connector, pre-aligning the opposed pin and socket contacts. The shoulders have inclined edges at their outer faces, to assist in capturing their associated opposed shoulders and guide them, in a self-aligning manner, into the nesting relation. The connectors require a 90.degree.