Abstract: An apparatus for generating a detected punctured position in punctured convolutional codes. A delay line circuit has a plurality of delay elements connected in series, storing a finite sequence of an input bit stream. A logic gate circuit, coupled to outputs of a part of the delay elements of the delay line circuit in accordance with a parity check polynomial, performs a logic operation to output a number stream. The number stream is accumulated for possible punctured positions and the one of the possible punctured positions with a minimal accumulated number is selected and determined as the detected punctured position.

Abstract: A system for detecting a regularly appearing pattern in a stream of symbols. The system comprises a detector, a first and second memory, a first and second pointer, and a processor. The detector compares detecting bits with a predetermined value, and generates a detection signal when the received symbol is equal to the predetermined value. The first memory array has K cells, and the second memory array has W cells. The first pointer circularly points to each cell of the first memory array in order. The second pointer does the same. The count value of the cell pointed to by the first or second pointer is incremented by one when the detection signal is received. The processor determines whether the regularly appearing pattern is detected or not according to the count values of the first and the second memory array.

Abstract: An apparatus and method for determining a puncture position for a de-puncturing process. A stream of received symbols that corresponds to a code is received. A slicing unit slices the stream of received symbols to determine representative bits of the code to form a first bit stream. A delay line delays the first bit stream to generate a second bit stream. A convolutional decoder de-punctures and decodes the received symbol to generate a third bit stream.

Abstract: A method for estimating channels of an OFDM signal. The method comprises the steps of deriving responses of pilot channels, deriving responses of first data channels by time and frequency domain combined linear interpolation among the responses of the pilot channels, deriving each response of boundary channels by frequency domain linear interpolation between the responses of the nearest pilot and first data channels, and deriving responses of second data channels by frequency domain extrapolation using the responses of the pilot and first data channels.

Abstract: A metric generation scheme for use in OFDM receivers. In a preferred embodiment, an OFDM receiver of the invention includes a dynamic quantizer to compress a series of channel-state information values. Also, a bit de-interleaver is provided to de-interleave a series of symbol-based data inverse to interleaving operations at a transmitter end. The de-interleaved symbol-based data is further compressed by another dynamic quantizer to yield a complex signal according to a constellation scheme. Then a metric generator calculates a bit metric of a zero group and a bit metric of a one group for each received bit in which the constellation is divided into the one group and the zero group for each bit location.

Abstract: A method and system for locating packet boundaries in a bit stream. The method comprises generating a checksum from a first bit stream, and recovering the first bit stream according an intermediate result which is generated during the checksum processing. The step of generating the checksum comprises dividing the first bit stream by a first polynomial to obtain a second bit stream, delaying the second bit stream by a first delay amount to form a third bit stream, multiplying the third bit stream by a second polynomial to obtain a fourth bit stream, adding the second and fourth bit streams to form a fifth bit stream, and correlating the fifth bit stream with a preset pattern to output a sync signal. The input bit stream can be recovered according to the third bit stream. The sync signal indicates the location of the packet boundary in the delayed first bit stream.

Abstract: A method for adaptively tuning an equalizer is disclosed. The method includes utilizing the equalizer to process an input signal and accordingly generate an output signal, determining whether the equalizer has converged, and adjusting an equalizer step size of the equalizer according to a result of the step of determining whether the equalizer has converged.

Abstract: A method and a related apparatus that decode an input signal to generate an output signal. The method includes determining burst noise locations corresponding to the input signal and generating a first indication signal accordingly, decoding the input signal to generate an inner-code decoded signal, selectively adopting one of a plurality of determining criteria according to the first indication signal to determine reliability information corresponding to the inner-code decoded signal and to generate a second indication signal accordingly, and decoding the inner-code decoded signal with reference to the second indication signal to generate the output signal.

Abstract: An apparatus for error-correcting an input signal to generate an output signal. The apparatus includes an unreliable-location determining module for determining unreliable-locations of the input signal and generating an indication signal accordingly, a first error-correcting module for error-correcting the input signal to generate a first candidate signal, a second error-correcting module coupled to the unreliable-location determining module for error-correcting the input signal with reference to the indication signal to generate a second candidate signal, and a selecting module coupled to the first and second error-correcting modules for selecting one of the first and second candidate signals to be the output signal.

Abstract: A carrier recovery apparatus for digital Quadrature Amplitude Modulation (QAM) receivers is disclosed. The carrier recovery apparatus includes a phase detector, a lock controller, a frequency locker and a phase loop filter, and provide phase/frequency error information for a numerically controlled oscillator (NCO) to generate recovered carrier frequency. The phase detector detects the symbol energy information and the phase error information of the extracted symbols from the I/Q extractor. The lock controller monitors the symbol energy from the phase detector, separates the extracted symbols into two groups: valid and non-valid, and outputs the control flag of valid symbols into both the frequency locker and the phase loop filter. To achieve a wide range acquisition and a good tracking performance, the lock controller controls the operation of the frequency locker and the phase loop filter in three operations.

Abstract: A systolic product-sum calculator for computing A*B+C over multi-basis in Galois fields GF(2m) includes a systolic architecture comprises a plurality of basic cells arranged in m rows and m columns, at least one row of n multiplexers disposed between two pre-determined rows, n and n-1, and a column of stacked multiplexers. At least one selection line is used to control the multiplexers for selecting the outputs over multi-basis including at least GF(2m) or GF(2n).

Abstract: A metric generation scheme for use in OFDM receivers. In a preferred embodiment, an OFDM receiver of the invention includes a dynamic quantizer to compress a series of channel-state information values. Also, a bit de-interleaver is provided to de-interleave a series of symbol-based data inverse to interleaving operations at a transmitter end. The de-interleaved symbol-based data is further compressed by another dynamic quantizer to yield a complex signal according to a constellation scheme. Then a metric generator calculates a bit metric of a zero group and a bit metric of a one group for each received bit in which the constellation is divided into the one group and the zero group for each bit location.

Abstract: An apparatus and method for estimation of channel state information in OFDM receivers. According to the invention, a noise power estimator is provided to evaluate an average noise power estimate on a sub-carrier of an OFDM symbol. Furthermore, a channel power calculator is provided to calculate a channel power on the sub-carrier from a channel response estimate. By calculating a ratio of the channel power to the average noise power estimate of the sub-carrier, a CNR calculator can estimate a carrier-to-noise ratio on the sub-carrier. Based on the carrier-to-noise ratio of the sub-carrier and a predetermined threshold, a CSI generator thus determines a CSI estimate for the sub-carrier. If the carrier-to-noise ratio of the sub-carrier is less than the predetermined threshold, the CSI estimate for the sub-carrier is set to the carrier-to-noise ratio of the sub-carrier divided by the predetermined threshold; otherwise, it is set to one.

Abstract: A method for estimating channels of an OFDM signal. The method comprises the steps of deriving responses of pilot channels, deriving responses of first data channels by time and frequency domain combined linear interpolation among the responses of the pilot channels, deriving each response of boundary channels by frequency domain linear interpolation between the responses of the nearest pilot and first data channels, and deriving responses of second data channels by frequency domain extrapolation using the responses of the pilot and first data channels.

Abstract: A carrier recovery apparatus for digital Quadrature Amplitude Modulation (QAM) receivers is disclosed. The carrier recovery apparatus includes a phase detector, a lock controller, a frequency locker and a phase loop filter, and provide phase/frequency error information for a numerically controlled oscillator (NCO) to generate recovered carrier frequency. The phase detector detects the symbol energy information and the phase error information of the extracted symbols from the I/Q extractor. The lock controller monitors the symbol energy from the phase detector, separates the extracted symbols into two groups: valid and non-valid, and outputs the control flag of valid symbols into both the frequency locker and the phase loop filter. To achieve a wide range acquisition and a good tracking performance, the lock controller controls the operation of the frequency locker and the phase loop filter in three operations.

Abstract: A systolic product-sum calculator for computing A*B+C over multi-basis in Galois fields GF(2m) includes a systolic architecture comprises a plurality of basic cells arranged in m rows and m columns, at least one row of n multiplexers disposed between two pre-determined rows, n and n−1, and a column of stacked multiplexers. At least one selection line is used to control the multiplexers for selecting the outputs over multi-basis including at least GF(2m) or GF(2n).