Abstract: The present disclosure relates to a method of preventing or treating brain cancers or brain metastases with mesoporous silica nanoparticles (MSNs) loaded with taxane-based chemotherapeutic drugs, in particular paclitaxel (PTX), cabazitaxel (CTX) or docetaxel (DTX), and the MSNs loaded with PTX, CTX or DTX.

Abstract: A memory system for maintaining data consistency and an operation method thereof are provided. The operation method includes: receiving a first data in a first cache of a first memory from a processor; reading the first data from the first cache and writing the first data as a redo log into a log buffer of the first memory; writing the redo log from the log buffer into a memory controller of the processor; performing an in-memory copy in a second memory to copy a second data as an undo log, wherein the second data is an old version of the first data; and writing the redo log from the memory controller into the second memory for covering the second data by the redo log as a third data, wherein the redo log, the third data and the first data are the same.

Abstract: An electrolytic eluent generator includes an electrolyte reservoir and at least one eluent generation cartridge. The electrolyte reservoir includes a chamber containing an aqueous electrolyte solution; and a first electrode. The at least one eluent generation cartridge includes a platinum mesh electrode; a polymer screen; a plurality of reinforced membranes; a membrane washer; and a spacer including a central post and an annular projection.

Abstract: Treatment of multiple myeloma with a combination of panobinostat and bortezomib at specified doses adjusted for safety.

Abstract: A memory device and an operation method thereof are provided. The memory device includes: a plurality of page buffers, storing an input data; a plurality of memory planes coupled to the page buffers, based on received addresses of the memory planes, a plurality of weights stored in the memory planes, the memory planes performing bit multiplication on the weights and the input data in the page buffers in parallel to generate a plurality of bit multiplication results in parallel, the bit multiplication results stored back to the page buffers; and at least one accumulation circuit coupled to the page buffers, for performing bit accumulation on the bit multiplication results of the memory planes in parallel or in sequential to generate a multiply-accumulate (MAC) operation result.

Abstract: An integrated circuit includes a transistor having a plurality of semiconductor nanostructures arranged in a stack and corresponding to channel regions of the transistor. The transistor includes a source/drain region in contact with the channel regions. The transistor includes a silicide that extends downward along a side of the source/drain region.

Abstract: A memory system for maintaining data consistency and an operation method thereof are provided. The operation method includes: receiving a first data in a first cache of a first memory from a processor; reading the first data from the first cache and writing the first data as a redo log into a log buffer of the first memory; writing the redo log from the log buffer into a memory controller of the processor; performing an in-memory copy in a second memory to copy a second data as an undo log, wherein the second data is an old version of the first data; and writing the redo log from the memory controller into the second memory for covering the second data by the redo log as a third data, wherein the redo log, the third data and the first data are the same.

Abstract: A method for generating goods modeling data comprises obtaining a platform image associated with a platform, a plurality of first goods images and a plurality of second goods images, wherein the first goods images and the second goods images correspond to different viewing angles respectively, and an image synthesis processing is performed according to the platform image and at least one of the first goods images and the second goods images to generate a synthesized image. The synthesized image includes a plurality of adjacent or partially overlapping image areas which correspond to at least many of the viewing angles. The image areas include a first and a second image areas. The first image area includes one of the first goods images or one of the second goods images. The second image area includes one of the first goods images or one of the second goods images.

Abstract: A plasma system is provided. The plasma system includes a low-temperature atmospheric-pressure plasma source and a water-mist supplying source. The low-temperature atmospheric-pressure plasma source has a nozzle. The nozzle is configured to eject a plasma. The water-mist supplying source is configured to deliver a water mist to the plasma ejected from the nozzle.

Abstract: A semiconductor device includes a substrate and a transistor. The transistor includes a first channel region overlying the substrate and a source/drain region in contact with the first channel region. The source/drain region has a first surface opposite the substrate and side surfaces extending from the first surface. A silicide layer is disposed on the first surface and the side surfaces of the source/drain region.

Abstract: A memory device and an operation method thereof are provided. The memory device includes: a plurality of page buffers, storing an input data; a plurality of memory planes coupled to the page buffers, based on received addresses of the memory planes, a plurality of weights stored in the memory planes, the memory planes performing bit multiplication on the weights and the input data in the page buffers in parallel to generate a plurality of bit multiplication results in parallel, the bit multiplication results stored back to the page buffers; and at least one accumulation circuit coupled to the page buffers, for performing bit accumulation on the bit multiplication results of the memory planes in parallel or in sequential to generate a multiply-accumulate (MAC) operation result.

Abstract: A storage device and a data accessing method are disclosed, wherein the storage device includes a memory circuit and a control circuit. The memory circuit includes a plurality of multi-level cells, and each of the multi-level cells is configured to store at least a first bit, a second bit and a third bit in at least a first page, a second page and a third page. The control circuit is configured to read the first bits according to a one-time reading operation related to the first bits, read the second bits according to M-times reading operations related to the second bits, and read the third bits according to N-times reading operations related to the third bits, wherein the difference between M and N is less than or equal to one.

Abstract: An electronic device including a device body, a first antenna module, a second antenna module, and an electrically conductive structure is provided. The first antenna module is disposed on the device body, and the second antenna module is disposed on the device body. The electrically conductive structure includes a first section and a second section, and the first section is connected between the first antenna module and the second section. The first section is extended along a first direction, the second section is extended toward the second antenna module along a second direction not parallel to the first direction, and the second section and the second antenna module have a gap therebetween.

Abstract: The disclosure provides a method for delivering an agent to posterior segment of an eye comprising administrating a pharmaceutical composition comprising the agent and mesoporous silica nanoparticles to the eye. An eye drop and a method for treating an ocular disease in a subject in need of such treatment are also provided.

Abstract: A capacitance-type sensing system for indirect contact includes a capacitance-type sensor and a grounding conductor. The capacitance-type sensor includes a sensing electrode and a driving circuit electrically connected to the sensing electrode. The driving circuit has a grounding terminal. The grounding conductor is electrically connected to the grounding terminal and configured to contact a grounding surface. A contact area of the grounding conductor is greater than or equal to 3000 mm2.

Abstract: A method for generating goods modeling data comprises obtaining a platform image associated with a platform, a plurality of first goods images and a plurality of second goods images, wherein the first goods images and the second goods images correspond to different viewing angles respectively, and an image synthesis processing is performed according to the platform image and at least one of the first goods images and the second goods images to generate a synthesized image. The synthesized image includes a plurality of adjacent or partially overlapping image areas which correspond to at least many of the viewing angles. The image areas include a first and a second image areas. The first image area includes one of the first goods images or one of the second goods images. The second image area includes one of the first goods images or one of the second goods images.

Abstract: A memory device and an operation method thereof are provided. The memory device includes: a memory array including a plurality of memory cells for storing a plurality of weights; a multiplication circuit coupled to the memory array, for performing bitwise multiplication on a plurality of input data and the weights to generate a plurality of multiplication results; a counting unit coupled to the multiplication circuit, for performing bitwise counting on the multiplication results to generate a MAC (multiplication and accumulation) operation result.

Abstract: A memory device and an operation method thereof are provided. The memory device includes: a memory array including a plurality of memory cells for storing a plurality of weights; a multiplication circuit for performing bitwise multiplication on a plurality of input data and the weights to generate a plurality of multiplication results, wherein in performing bitwise multiplication, the memory cells generate a plurality of memory cell currents; a digital accumulating circuit for performing a digital accumulating on the multiplication results; an analog accumulating circuit for performing an analog accumulating on the memory cell currents to generate a first MAC operation result; and a decision unit for deciding whether to perform the analog accumulating; the digital accumulating or a hybrid accumulating, wherein in performing the hybrid accumulating, whether the digital accumulating circuit is triggered is based on the first MAC operation result.

Abstract: An in-memory computing method and an in-memory computing apparatus are adapted to perform multiply-accumulate (MAC) operations on a memory by a processor. In the method, a pre-processing operation is respectively performed on input data and weight data to be written into input lines and memory cells of the memory to divide the input data and weight data into a primary portion and a secondary portion. The input data and the weight data divided into the primary portion and the secondary portion are written into the input lines and the memory cells in batches to perform the MAC operations and obtain a plurality of computation results. According to a numeric value of each of the computation results, the computation results are filtered. According to the portions to which the computation results correspond, a post-processing operation is performed on the filtered computation results to obtain output data.