Patents by Inventor Rong-Shen Lee

Rong-Shen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020092894
    Abstract: A one-step bumping/bonding process for forming a semiconductor package is disclosed. In the method, a first electronic substrate which has either a plurality of conductive pads or a plurality of recessed openings formed on top of a plurality of apertures through the substrate is first provided and aligned with a second electronic substrate that has a plurality of conductive pads with each aperture aligned to a conductive pad on the second substrate. A plurality of solder balls is then planted on top of the plurality of conductive pads or the plurality of recessed openings on the surface of the first electronic substrate by a pick-and-place technique. Alternatively, a plurality of solder paste may be printed by a thick film stencil printing process similarly in place of the plurality of solder balls.
    Type: Application
    Filed: January 16, 2001
    Publication date: July 18, 2002
    Applicant: Industrial Technology Research Institute
    Inventors: Hsing-Seng Wang, Rong-Shen Lee, Chiang-Han Day
  • Patent number: 6166435
    Abstract: An extended flip chip ball grid array package includes a metal heat slug bonded to the surface of a semiconductor chip. The heat slug has a bonding structure for connecting itself and a BGA substrate panel on which the semiconductor chip is mounted. The heat slug protects the chip from being damaged as well as assists heat dissipation. A first package assembly provides contact bodies on the heat slug for bonding the heat slug to contact pads formed on a BGA substrate panel. A second package assembly fixes the heat slug to a supporting structure bonded on a BGA substrate panel. Supporting stubs are formed on the supporting structure and snapped in openings formed on the contact bodies of the heat slug. Conventional packaging or testing equipment can be used for both package assemblies to manufacture or test the semiconductor chip packages.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: December 26, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Fang-Jun Leu, Rong-Shen Lee, Hsin-Chien Huang, Randy Hsiao-Yu Lo, Chiang-Han Day
  • Patent number: 5977626
    Abstract: The present invention includes a substrate having a die adhered thereon. The die and the substrate are interconnected by means of signal transferring means. Solder bumps are formed on the bottom side surface of the substrate. Molding compound is encapsulated among the substrate, the die and a heat spreader. A heat spreader is arranged over the top surface of the substrate. The heat spreader includes a plane having four supporting members that are set on the bottom side of the plane and at the corners of the plane. The supporting members are protruded from the plane to connect the heat spreaders and the substrate. The heat spreader further includes a protruded portion. A further supporting member is formed on the central portion of the protruded portion. The substrate has a die paddle formed thereon for receiving the die. A power ring is formed around the die paddle on the surface of the substrate for power input. A ground ring formed around the power ring on the substrate has ground pads.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: November 2, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Hsing-Seng Wang, Rong-Shen Lee, Pou-Huang Chen
  • Patent number: 5736785
    Abstract: The feature of the present invention is a heatspreader that is attached over a die instead of being set under the die to improve the efficient of spreading heat. A package includes a semiconductor die mounted to a die receiving area of a substrate. The die and a portion of the substrate are connected by using a conventional die attach material. A plurality of bonding wires are attached on the die. Further, conductive traces are on the top surface of the substrate. The die is electrically coupled to conductive traces by the bonding wires, a TAB method or a flip chip method. A plurality of conductive vias are also need for electrically coupling conductive traces on the top surface of the substrate to those on the bottom. Typically, at an end of portion of each conductive trace on the bottom of the substrate is an conductive pad for connecting to a solder ball. The die and portions of the substrate are encapsulated in a package body. A heatspreader is exactly set over the semiconductor die for spreading heat.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: April 7, 1998
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng Lien Chiang, Rong Shen Lee, Hsing Seng Wang