Abstract: A TORminator module is disposed with a switch linecard of a rack. The TORminator module receives downlink electrical data signals from a rack switch. The TORminator module translates the downlink electrical data signals into downlink optical data signals. The TORminator module transmits multiple subsets of the downlink optical data signals through optical fibers to respective SmartDistributor modules disposed in respective racks. Each SmartDistributor module receives multiple downlink optical data signals through a single optical fiber from the TORminator module. The SmartDistributor module demultiplexes the multiple downlink optical data signals and distributes them to respective servers. The SmartDistributor module receives multiple uplink optical data signals from multiple servers and multiplexes them onto a single optical fiber for transmission to the TORminator module.

Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

Abstract: An electrochemical sensor comprising: a boron doped diamond electrode formed of boron doped diamond material; an array of non-diamond carbon sites disposed on a sensing surface of the boron doped diamond electrode; electrochemically active surface groups bonded to the non-diamond carbon sites for generating a redox peak associated with a target species which reacts with the electrochemically active surface groups bonded to the non-diamond carbon sites when a solution containing the target species is disposed in contact with the sensing surface in use; an electrical controller configured to scan the boron doped diamond electrode over a potential range to generate said redox peak; and a processor configured to give an electrochemical reading based on one or both of a position and an intensity of said redox peak.

Abstract: A package assembly includes a silicon photonics chip having an optical waveguide exposed at a first side of the chip and an optical fiber coupling region formed along the first side of the chip. The package assembly includes a mold compound structure formed to extend around second, third, and fourth sides of the chip. The mold compound structure has a vertical thickness substantially equal to a vertical thickness of the chip. The package assembly includes a redistribution layer formed over the chip and over a portion of the mold compound structure. The redistribution layer includes electrically conductive interconnect structures to provide fanout of electrical contacts on the chip to corresponding electrical contacts on the redistribution layer. The redistribution layer is formed to leave the optical fiber coupling region exposed. An optical fiber is connected to the optical fiber coupling region in optical alignment with the optical waveguide within the chip.

Abstract: A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.

Abstract: A grating coupler reflector (retro reflector) is formed within a photonics chip and includes a vertical scattering region, an optical waveguide, and a reflector. The optical waveguide is optically coupled to the vertical scattering region. The reflector is positioned at an end of the optical waveguide. The reflector is configured to reflect light that propagates through the optical waveguide from the vertical scattering region back toward the vertical scattering region. The location of the grating coupler reflector on the photonics chip is determinable by scanning a light emitting active optical fiber over the chip and detecting when light is reflected back into the active optical fiber from the grating coupler reflector. The determined location of the grating coupler reflector on the photonics chip is usable as a reference location for aligning optical fiber(s) to corresponding optical grating couplers on the photonics chip.

Abstract: A wafer includes a number of die, with each die including electronic integrated circuits and optical devices. The wafer has a top surface and a bottom surface and a base layer. The bottom surface of the wafer corresponds to a bottom surface of the base layer. A wafer support system is attached to the top surface of the wafer. A thickness of the base layer is removed to expose a target layer within the wafer and to give the wafer a new bottom surface. A replacement handle structure is attached to the new bottom surface of the wafer. The replacement handle structure includes a first thickness region and a second thickness region. The first thickness region is positioned closest to the new bottom surface. The first thickness region is formed of an optical cladding material that mitigates optical coupling between optical devices within the die and the replacement handle structure.

Abstract: A TORminator module is disposed with a switch linecard of a rack. The TORminator module receives downlink electrical data signals from a rack switch. The TORminator module translates the downlink electrical data signals into downlink optical data signals. The TORminator module transmits multiple subsets of the downlink optical data signals through optical fibers to respective SmartDistributor modules disposed in respective racks. Each SmartDistributor module receives multiple downlink optical data signals through a single optical fiber from the TORminator module. The SmartDistributor module demultiplexes the multiple downlink optical data signals and distributes them to respective servers. The SmartDistributor module receives multiple uplink optical data signals from multiple servers and multiplexes them onto a single optical fiber for transmission to the TORminator module.

Abstract: A redistribution layer is formed on a carrier wafer. A cavity is formed within the redistribution layer. An electro-optical die is flip-chip connected to the redistribution layer. A plurality of optical fiber alignment structures within the electro-optical die is positioned over and exposed to the cavity. Mold compound material is disposed over the redistribution layer and the electro-optical die. A residual kerf region of the electro-optical die interfaces with the redistribution layer to prevent mold compound material from entering into the optical fiber alignment structures and the cavity. The carrier wafer is removed from the redistribution layer. The redistribution layer and the mold compound material are cut to obtain an electro-optical chip package that includes the electro-optical die. The cutting removes the residual kerf region from the electro-optical die to expose the plurality of optical fiber alignment structures and the cavity at an edge of the electro-optical chip package.

Abstract: A remote memory system includes a substrate of a multi-chip package, an integrated circuit chip connected to the substrate, and an electro-optical chip connected to the substrate. The integrated circuit chip includes a high-bandwidth memory interface. An electrical interface of the electro-optical chip is electrically connected to the high-bandwidth memory interface. A photonic interface of the electro-optical chip is configured to optically connect with an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals received through the electrical interface from the high-bandwidth interface into outgoing optical data signals. The optical macro transmits the outgoing optical data signals through the photonic interface to the optical link. The optical macro also converts incoming optical data signals received through the photonic interface into incoming electrical data signals.

Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

Abstract: A vertical integrated photonics chiplet assembly includes a package substrate and an external device connected to a top surface of the package substrate. A photonics chip is disposed within the package substrate. The photonics chip includes optical coupling devices positioned at a top surface of the photonics chip. A plurality of conductive via structures are disposed within the package substrate in electrical connection with electrical circuits within the photonics chip. The plurality of conductive via structures are electrically connected through the package substrate to the external device. An opening is formed through the top surface of the substrate to expose a portion of the top surface of the photonics chip at which the optical coupling devices are positioned. An optical fiber array is disposed and secured within the opening such that a plurality of optical fibers of the optical fiber array optically couple to the optical coupling devices.

Abstract: A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.

Abstract: A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.

Abstract: A handle-integrated composite wafer assembly includes a handle wafer attached to a device wafer. The device wafer includes a device layer formed on a buried oxide layer. The device layer includes an optical resonator structure. The handle wafer includes a base layer and a layer of anti-reflective material disposed on a top side of the base layer. The base layer has a cavity extending into the base layer from the top side of the base layer. The cavity has at least one side surface and a bottom surface. The layer of anti-reflective material is substantially conformally disposed within the cavity on the at least one side surface and bottom surface of the cavity. The handle wafer is attached to the device wafer with the layer of anti-reflective material affixed to the buried oxide layer, and with the cavity substantially aligned with the optical resonator structure in the device layer.

Abstract: A plurality of lid structures include at least one lid structure configured to overlie one or more heat sources within a multi-chip-module and at least one lid structure configured to overlie one or more temperature sensitive components within the multi-chip-module. The plurality of lid structures are configured and positioned such that each lid structure is separated from each adjacent lid structure by a corresponding thermal break. A heat spreader assembly is positioned in thermally conductive interface with the plurality of lid structures. The heat spreader assembly is configured to cover an aggregation of the plurality of lid structures. The heat spreader assembly includes a plurality of separately defined heat transfer members respectively configured and positioned to overlie the plurality of lid structures. The heat spreader assembly is configured to limit heat transfer between different heat transfer members within the heat spreader assembly.

Abstract: A laser module includes a laser source and an optical marshalling module. The laser source is configured to generate and output a plurality of laser beams. The plurality of laser beams have different wavelengths relative to each other. The different wavelengths are distinguishable to an optical data communication system. The optical marshalling module is configured to receive the plurality of laser beams from the laser source and distribute a portion of each of the plurality of laser beams to each of a plurality of optical output ports of the optical marshalling module, such that all of the different wavelengths of the plurality of laser beams are provided to each of the plurality of optical output ports of the optical marshalling module. An optical amplifying module can be included to amplify laser light output from the optical marshalling module and provide the amplified laser light as output from the laser module.

Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.

Abstract: An optical module includes a laser light supply system and a chip disposed within a housing. The chip includes a laser input optical port and a transmit data optical port and a receive data optical port. The optical module includes a link-fiber interface exposed at an exterior surface of the housing. The link-fiber interface includes a transmit data connector and a receive data connector. The optical module includes a polarization-maintaining optical fiber connected between a laser output optical port of the laser light supply system and the laser input optical port of the chip. The optical module includes a first non-polarization-maintaining optical fiber connected between the transmit data optical port of the chip and the transmit data connector of the link-fiber interface. The optical module includes a second non-polarization-maintaining optical fiber connected between the receive data optical port of the chip and the receive data connector of the link-fiber interface.

Abstract: An optical input/output chiplet is disposed on a first package substrate. The optical input/output chiplet includes one or more supply optical ports for receiving continuous wave light. The optical input/output chiplet includes one or more transmit optical ports through which modulated light is transmitted. The optical input/output chiplet includes one or more receive optical ports through which modulated light is received by the optical input/output chiplet. An optical power supply module is disposed on a second package substrate. The second package substrate is separate from the first package substrate. The optical power supply module includes one or more output optical ports through which continuous wave laser light is transmitted. A set of optical fibers optically connect the one or more output optical ports of the optical power supply module to the one or more supply optical ports of the optical input/output chiplet.