Abstract: A multilayer capable electrically conductive adhesive (ECA) mixture for connecting multilevel Z-axis interconnects and a method of forming the ECA for connecting multilevel Z-axis interconnects. The multilayer capable ECA contains a mixture of constituent components that allow the paste to be adapted to specific requirements wherein the method of making a circuitized substrate assembly in which two or more subassemblies having potentially disparate coefficients of thermal expansion (CTE) are aligned and Z-axis interconnection are created during bonding. The metallurgies of the conductors, and those of a multilayer capable conductive paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies flows to engage and surround the conductor coupling.

Abstract: A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.

Abstract: A multilayer capable electrically conductive adhesive (ECA) mixture for connecting multilevel Z-axis interconnects and a method of forming the ECA for connecting multilevel Z-axis interconnects. The multilayer capable ECA contains a mixture of constituent components that allow the paste to be adapted to specific requirements wherein the method of making a circuitized substrate assembly in which two or more subassemblies having potentially disparate coefficients of thermal expansion (CTE) are aligned and Z-axis interconnection are created during bonding. The metallurgies of the conductors, and those of a multilayer capable conductive paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies flows to engage and surround the conductor coupling.

Abstract: A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.

Abstract: An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation.

Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.

Abstract: A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.

Abstract: A photoresist composition, e.g., a positive acting resist, for use in the formation of circuit patterns and the like on printed circuit boards and the like circuitized substrates, the photoresist composition including a quantity of silver therein in a sufficient amount to substantially prevent bacteria formation within said composition. A method of making the composition is also provided.

Abstract: A circuitized substrate and method of making same in which a first plurality of holes are formed within two bonded dielectric layers and then made conductive, e.g., plated. The substrate also includes third and fourth dielectric layers bonded to the first and second with a plurality of continuous electrically conductive thru holes extending through all four dielectric layers. Conductive paste is positioned within the thru holes for providing electrical connections between desired conductive layers of the substrate and outer layers as well. A circuitized substrate assembly and method of making same are also provided.

Abstract: A method for protecting a material of a microstructure comprising the material and a noble metal layer against undesired galvanic etching during manufacture, the method comprises forming on the structure a sacrificial metal layer having a lower redox potential than the material, the sacrificial metal layer being electrically connected to the noble metal layer.

Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.

Abstract: An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation.

Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.

Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.

Abstract: A method of preventing adhesive bleed onto the metal (e.g., gold) surfaces of a plurality of electrical conductors (e.g., wire-bond pads) positioned on a dielectric substrate when positioning an electronic component onto the dielectric substrate and electrically coupling (e.g., wire-bonding) the component to the metal surfaces. The method includes contacting the metal surfaces with a chemical composition which comprises a minor amount of a surface active agent (e.g., a thiol) and the remainder substantially being a non-reactive solvent (e.g., methanol). A circuitized substrate produced using this method is also provided.

Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a binder component and at least one metallic component including microparticles. In another embodiment, the paste includes the binder and a plurality of nano-wires. Selected ones of the microparticles or nano-wires include a layer of solder thereon. A method of making such a substrate is also provided, as are an electrical assembly and information handling system adapter for having such a substrate as part thereof.

Abstract: A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

Abstract: A photoresist composition, e.g., a positive acting resist, for use in the formation of circuit patterns and the like on printed circuit boards and the like circuitized substrates, the photoresist composition including a quantity of silver therein in a sufficient amount to substantially prevent bacteria formation within said composition. A method of making the composition is also provided.

Abstract: A method of plating a circuit pattern on a substrate to produce a circuitized substrate (e.g., a printed circuit board) in which a dual step metallurgy application process is used in combination with a dual step photo-resist removal process. Thru-holes are also possible, albeit not required.

Abstract: A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.