Abstract: A connector includes a housing with a height direction, a core installed in the housing, and a terminal disposed in the core and extending along the height direction. The core is floatably installed into the housing and can be moved relative to the housing in a direction perpendicular to the height direction.

Abstract: An adapter layer transforms requests generated by an external API according to internal back-end specifications, and also transforms responses received from the back-end software before such responses are sent to the external API. The adapter layer may include any number of chained adapters, configured so that the output of one adapter is provided as input for another adapter. Each adapter can be configured to transform requests and/or responses between one API version and an immediately preceding or succeeding API version. An appropriate chain of adapters can be activated to perform transformations as needed between a particular API and the format expected by the back-end software. Development of adapters is thus simplified, as the system avoids the need to provide different adapters for each possible combination of software versions operating with one another and with the back-end software.

Abstract: An adapter layer transforms requests generated by an external API according to internal back-end specifications, and also transforms responses received from the back-end software before such responses are sent to the external API. The adapter layer may include any number of chained adapters, configured so that the output of one adapter is provided as input for another adapter. Each adapter can be configured to transform requests and/or responses between one API version and an immediately preceding or succeeding API version. An appropriate chain of adapters can be activated to perform transformations as needed between a particular API and the format expected by the back-end software. Development of adapters is thus simplified, as the system avoids the need to provide different adapters for each possible combination of software versions operating with one another and with the back-end software.

Abstract: An apparatus includes a delay line having multiple delay cells coupled in series. The delay line is configured to receive an input signal and to propagate the input signal through the delay cells. The apparatus also includes multiple sampling circuits configured to sample the input signal at different taps in the delay line and to output sampled values. The delay line has (i) a finer resolution closer to a target tap and (ii) a coarser resolution farther away from the target tap on each side of the target tap. For example, taps nearer the target tap can be closer to each other in order to support the finer resolution, and taps farther from the target tap can be farther apart from each other in order to support the coarser resolution. The apparatus can further include an encoder configured to encode the sampled values in order to generate an encoded value.

Abstract: Embodiments of the invention provide methods and data structures for the effective and efficient synchronization or inter-exchange of invoice information between business applications employing disparate DOFs. For one embodiment, a DOF is provided that allows for relationships between entities, also referred to as invoices, to be modeled as attributes of an entity and for customization of the DOF in a manner that facilitates upgrading of the DOF. For one embodiment, the invoice DOF is provided in a common software language such as XML. For one embodiment, invoice information from each of several business applications is translated to a common DOF. The invoice information, in the common DOF, is then inter-exchanged among the several business applications. Each application has only to translate the invoice information from the common DOF to the application-specific DOF of the respective business application.

Abstract: The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a memory to the next clock edge to determine a timing value. When the clock frequency changes from a first frequency to a second frequency, the timing value changes from a first value to a second value. The magnitude of the supply voltage is changed to return the timing value to the first value.

Abstract: The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a memory to the next clock edge to determine a timing value. When the clock frequency changes from a first frequency to a second frequency, the timing value changes from a first value to a second value. The magnitude of the supply voltage is changed to return the timing value to the first value.