Patents by Inventor Roy Liu

Roy Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240111383
    Abstract: A method of quantifying the effect of peripheral optical errors on patient locomotion includes projecting a pattern on the floor that includes a discrete shapes and empty spaces between the discrete shapes. The method also includes tracking a position of the participant along the pattern as the participant traverses the pattern, and determining foot placement accuracy, utilizing a optical motion capture system and a computer, as the participant walked through the pattern by determining a total area of overlap between the participant's feet and the empty spaces of the pattern. In another embodiment, the method includes arranging obstacles in front of a participant, intermittently displaying a character in front of the participant, determining participant's accuracy in identifying or counting the characters, and determining the participant's step length and foot clearance as the participant steps over the obstacles to quantify the effect of the peripheral optical errors on the participant's locomotion.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 4, 2024
    Inventors: Roy Reints, Marrie van der Mooren, Carmen Canovas Vidal, Ariel Zenouda, Yichao Liu, Christopher Reeves, Robert Rosen
  • Patent number: 11349961
    Abstract: An adapter layer transforms requests generated by an external API according to internal back-end specifications, and also transforms responses received from the back-end software before such responses are sent to the external API. The adapter layer may include any number of chained adapters, configured so that the output of one adapter is provided as input for another adapter. Each adapter can be configured to transform requests and/or responses between one API version and an immediately preceding or succeeding API version. An appropriate chain of adapters can be activated to perform transformations as needed between a particular API and the format expected by the back-end software. Development of adapters is thus simplified, as the system avoids the need to provide different adapters for each possible combination of software versions operating with one another and with the back-end software.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: May 31, 2022
    Assignee: Sage Intacct, Inc.
    Inventors: Valer Crisan, Roy Liu
  • Publication number: 20220116480
    Abstract: An adapter layer transforms requests generated by an external API according to internal back-end specifications, and also transforms responses received from the back-end software before such responses are sent to the external API. The adapter layer may include any number of chained adapters, configured so that the output of one adapter is provided as input for another adapter. Each adapter can be configured to transform requests and/or responses between one API version and an immediately preceding or succeeding API version. An appropriate chain of adapters can be activated to perform transformations as needed between a particular API and the format expected by the back-end software. Development of adapters is thus simplified, as the system avoids the need to provide different adapters for each possible combination of software versions operating with one another and with the back-end software.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Inventors: Valer Crisan, Roy Liu
  • Patent number: 8004329
    Abstract: An apparatus includes a delay line having multiple delay cells coupled in series. The delay line is configured to receive an input signal and to propagate the input signal through the delay cells. The apparatus also includes multiple sampling circuits configured to sample the input signal at different taps in the delay line and to output sampled values. The delay line has (i) a finer resolution closer to a target tap and (ii) a coarser resolution farther away from the target tap on each side of the target tap. For example, taps nearer the target tap can be closer to each other in order to support the finer resolution, and taps farther from the target tap can be farther apart from each other in order to support the coarser resolution. The apparatus can further include an encoder configured to encode the sampled values in order to generate an encoded value.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: August 23, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Hsing-Chien Roy Liu, Wai Cheong Chan
  • Publication number: 20070265944
    Abstract: Embodiments of the invention provide methods and data structures for the effective and efficient synchronization or inter-exchange of invoice information between business applications employing disparate DOFs. For one embodiment, a DOF is provided that allows for relationships between entities, also referred to as invoices, to be modeled as attributes of an entity and for customization of the DOF in a manner that facilitates upgrading of the DOF. For one embodiment, the invoice DOF is provided in a common software language such as XML. For one embodiment, invoice information from each of several business applications is translated to a common DOF. The invoice information, in the common DOF, is then inter-exchanged among the several business applications. Each application has only to translate the invoice information from the common DOF to the application-specific DOF of the respective business application.
    Type: Application
    Filed: October 16, 2003
    Publication date: November 15, 2007
    Inventors: Nardo Catahan, Ying-Chieh Lan, Roy Liu, Joshua Roper
  • Patent number: 7206959
    Abstract: The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a memory to the next clock edge to determine a timing value. When the clock frequency changes from a first frequency to a second frequency, the timing value changes from a first value to a second value. The magnitude of the supply voltage is changed to return the timing value to the first value.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: April 17, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Wai Cheong Chan, James Thomas Doyle, Pavel Poplevine, Murali Krishna Varadarajula, Hsing-Chien Roy Liu, Gordon Mortensen
  • Patent number: 7069461
    Abstract: The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a memory to the next clock edge to determine a timing value. When the clock frequency changes from a first frequency to a second frequency, the timing value changes from a first value to a second value. The magnitude of the supply voltage is changed to return the timing value to the first value.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: June 27, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Wai Cheong Chan, James Thomas Doyle, Pavel Poplevine, Murali Krishna Varadarajula, Hsing-Chien Roy Liu, Gordon Mortensen
  • Patent number: D748509
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: February 2, 2016
    Assignee: Mettler-Toledo AG
    Inventors: Patrick Ammon, Yves Marmier, Thibault Escalier, Roy Liu