Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first trench partially through a first substrate from a first side of the first substrate. The method also includes widening a bottom portion of the first trench to form a lateral footing area of the first trench. The method includes forming a first metallization in the first trench; forming a second trench through a second substrate from a second side of the second substrate to expose at least a portion of first metallization in an area corresponding to the lateral footing area of the first trench, the second side being opposite to the first side. The method also includes forming a second metallization in the second trench in contact with the first metallization.

Abstract: A semiconductor device is provided. The semiconductor device includes a protective liner, and a buried power rail on a first portion of the protective liner, wherein the protective liner is on opposite sides of the buried power rail. The semiconductor device further includes a source/drain on a second portion of the protective liner, wherein the source/drain is offset from the buried power rail, and a source/drain contact on the source/drain and in electrical communication with the buried power rail.

Abstract: A method of fabricating a semiconductor device comprises forming backside power rails in a dielectric layer arranged above a backside interlayer dielectric (BILD) layer or a semiconductor layer, forming a trench that extends through the BILD layer or the semiconductor layer and partly through the dielectric layer between the backside power rails, depositing a plurality of layers to form a backside metal-insulator-metal (MIM) capacitor in the trench, and forming a first contact to a first metal layer of the plurality of layers. Forming the first contact comprises forming first recesses in a second metal layer of the plurality of layers, and filling the first recesses with an insulative material. The method further comprises forming a second contact to the second metal layer. Forming the second contact comprises forming second recesses in the first metal layer, and filling the second recesses with the insulative material.

Abstract: A semiconductor structure includes a substrate and a first field effect transistor (FET) formed on the substrate; the first FET includes a first FET first source-drain region, a first FET second source-drain region, a first FET gate between the first and second source-drain regions, and a first FET channel region adjacent the first FET gate and between the first FET first and second source-drain regions. Also included is a buried power rail, buried in the substrate, having a top at a level lower than the first FET channel region, and having buried power rail sidewalls. A first FET shared contact is electrically interconnected with the buried power rail and the first FET second source-drain region, and a first FET electrically isolating region is adjacent the buried power rail sidewalls and separates the buried power rail from the substrate.

Abstract: A semiconductor device includes a dielectric isolation layer, a plurality of gates formed above the dielectric isolation layer, a plurality of source/drain regions above the dielectric isolation layer between the plurality of gates, and at least one contact placeholder for a backside contact. The at least one contact placeholder contacts a bottom surface of a first source/drain region of the plurality of source/drain regions. The semiconductor device further includes at least one backside contact contacting a bottom surface of a second source/drain region of the plurality of source/drain regions, and a buried power rail arranged beneath, and contacting the at least one backside contact.

Abstract: A method for forming a nanostructure includes coating an exposed surface of a base layer with a patterning layer. The method further includes forming a pattern in the patterning layer including nano-patterned non-random openings, such that a bottom portion of the non-random openings provides direct access to the exposed surface of the base layer. The method also includes depositing a material in the non-random openings in the patterning layer, such that the material contacts the exposed surface to produce repeating individually articulated nano-scale features. The method includes removing remaining portions of the patterning layer. The method further includes forming an encapsulation layer on exposed surfaces of the repeating individually articulated nanoscale features and the exposed surface of the base layer.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first trench partially through a first substrate from a first side of the first substrate. The method also includes widening a bottom portion of the first trench to form a lateral footing area of the first trench. The method includes forming a first metallization in the first trench; forming a second trench through a second substrate from a second side of the second substrate to expose at least a portion of first metallization in an area corresponding to the lateral footing area of the first trench, the second side being opposite to the first side. The method also includes forming a second metallization in the second trench in contact with the first metallization.

Abstract: Technical solutions are described for implementing an optogenetics treatment using a probe and probe controller are described. A probe controller controls a probe to perform the method that includes emitting, by a light source of the probe, the probe is embeddable in a tissue, a light wave to interact with a corresponding chemical in one or more cells in the tissue. The method further includes capturing, by a sensor of the probe, a spectroscopy of the light wave interacting with the corresponding chemical. The method further includes sending, by the probe, the spectroscopy to an analysis system. The method further includes receiving, by the probe, from the analysis system, adjusted parameters for the light source, and adjusting, by a controller of the probe, settings of the light source according to the received adjusted parameters to emit a different light wave to interact with the corresponding chemical.

Abstract: A 4D device comprises a 2D multi-core logic and a 3D memory stack connected through the memory stack sidewall using a fine pitch T&J connection. The 3D memory in the stack is thinned from the original wafer thickness to no remaining Si. A tongue and groove device at the memory wafer top and bottom surfaces allows an accurate stack alignment. The memory stack also has micro-channels on the backside to allow fluid cooling. The memory stack is further diced at the fixed clock-cycle distance and is flipped on its side and re-assembled on to a template into a pseudo-wafer format. The top side wall of the assembly is polished and built with BEOL to fan-out and use the T&J fine pitch connection to join to the 2D logic wafer. The other side of the memory stack is polished, fanned-out, and bumped with C4 solder. The invention also comprises a process for manufacturing the device.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first recess partially through a substrate from a first side of the substrate, forming a dielectric layer in the first recess, forming a second recess partially through the dielectric layer from the first side of the substrate, and forming a buried power rail (BPR) in the second recess of the dielectric layer. The method also includes thinning the substrate from a second side of the substrate to a level of the dielectric layer, the second side of the substrate being opposite to the first side of the substrate.

Abstract: A three-dimensional (3D) comb probe structure includes a carrier, a plurality of combs arranged in the carrier and spaced apart from one another, a plurality of shanks forming the combs, each shank including a base portion and a stem portion extending from the base portion, wherein sets of the shanks are joined together by the base portions thereof to form a respective comb, and a plurality of sensing elements disposed along the stem portion of each of the shanks and electrically connected to electrical contacts disposed at respective ones of the base portions. The sensing elements can include nanopatterned features on surfaces thereof forming a non-random topography.

Abstract: A biosensor includes an array of metal nanorods formed on a substrate. An electropolymerized conductor is formed over tops of a portion of the nanorods to form a reservoir between the electropolymerized conductor and the substrate. The electropolymerized conductor includes pores that open and close responsively to electrical signals applied to the nanorods. A dispensing material is loaded in the reservoir to be dispersed in accordance with open pores.

Abstract: A sensing and treatment device includes an array of metal nanorod electrodes formed on a substrate, the array including first electrodes for sensing, and second electrodes for electrical pulsation. A data processing system is configured to monitor a parameter using the first electrodes and to activate the electrical pulsation in the second electrodes in accordance with a reading of the parameter.

Abstract: A sensing and treatment device includes an array of metal nanorod electrodes formed on a substrate, the array including first electrodes for sensing, and second electrodes for electrical pulsation. A data processing system is configured to monitor a parameter using the first electrodes and to activate the electrical pulsation in the second electrodes in accordance with a reading of the parameter.

Abstract: Lenses and methods for adjusting the focus of a lens include dividing multiple light sensors in a lens into four quadrants. A position of the lens relative to occlusion along a top and bottom edge of the lens is determined based on numbers of bits in respective bit sequences from light sensors in respective regions of the lens. An optimal focal length for the lens is determined based on the position of the lens. The focal length of the lens is adjusted to match the optimal focal length.

Abstract: The present invention relates to CNT filled polymer composite system possessing a high thermal conductivity and high temperature stability so that it is a highly thermally conductive for use in 3D and 4D integration for joining device sub-laminate layers. The CNT/polymer composite also has a CTE close to that of Si, enabling a reduced wafer structural warping during high temperature processing cycling. The composition is tailored to be suitable for coating, curing and patterning by means conventionally known in the art.

Abstract: Aspects include methods of fabricating antibacterial surfaces for medical implant devices including patterning a photoresist layer on a silicon substrate and etching the silicon to generate a plurality of nanopillars. Aspects also include removing the photoresist layer from the structure and coating the plurality of nanopillars with a biocompatible film. Aspects also include a system for preventing bacterial infection associated with medical implants including a thin silicon film including a plurality of nanopillars.

Abstract: Techniques regarding an implantable biosensor package are provided. For example, one or more embodiments described herein can regard an apparatus, which can comprise a biosensor module. The biosensor module can comprise a semiconductor substrate and a processor. The semiconductor substrate can have a sensor operably coupled to the processor. The apparatus can also comprise a polymer layer. The biosensor module can be embedded within the polymer layer such that the polymer layer can be provided on a plurality of sides of the biosensor module.

Abstract: A biosensor includes an array of metal nanorods formed on a substrate. An electropolymerized conductor is formed over tops of a portion of the nanorods to form a reservoir between the electropolymerized conductor and the substrate. The electropolymerized conductor includes pores that open and close responsively to electrical signals applied to the nanorods. A dispensing material is loaded in the reservoir to be dispersed in accordance with open pores.

Abstract: A nanodevice includes an array of metal nanorods formed on a substrate. An electropolymerized electrical conductor is formed over tops of a portion of the nanorods to form a reservoir between the electropolymerized conductor and the substrate. The electropolymerized conductor includes pores that open or close responsively to electrical signals applied to the nanorods. A cell loading region is disposed in proximity of the reservoir, and the cell loading region is configured to receive stem cells. A neurotrophic dispensing material is loaded in the reservoir to be dispersed in accordance with open pores to affect growth of the stem cells when in vivo.