Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low.

Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low.

Abstract: A circuit includes a processor that analyzes a pulse width modulated (PWM) signal feedback from a brushless DC motor to determine a transition between a mutual inductance zero crossing condition and a Back Electro Motive Force (BEMF) zero crossing condition of the brushless DC motor. A mutual inductance controller is executed by the processor to commutate the brushless DC motor at startup of the motor when the mutual inductance zero crossing condition is detected by the processor. A BEMF controller is executed by the processor to commutate the brushless DC motor after startup of the motor when the BEMF zero crossing condition is detected by the processor.

Abstract: A circuit includes a processor that analyzes a pulse width modulated (PWM) signal feedback from a brushless DC motor to determine a transition between a mutual inductance zero crossing condition and a Back Electro Motive Force (BEMF) zero crossing condition of the brushless DC motor. A mutual inductance controller is executed by the processor to commutate the brushless DC motor at startup of the motor when the mutual inductance zero crossing condition is detected by the processor. A BEMF controller is executed by the processor to commutate the brushless DC motor after startup of the motor when the BEMF zero crossing condition is detected by the processor.

Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low.

Abstract: A circuit includes a processor that analyzes a pulse width modulated (PWM) signal feedback from a brushless DC motor to determine a transition between a mutual inductance zero crossing condition and a Back Electro Motive Force (BEMF) zero crossing condition of the brushless DC motor. A mutual inductance controller is executed by the processor to commutate the brushless DC motor at startup of the motor when the mutual inductance zero crossing condition is detected by the processor. A BEMF controller is executed by the processor to commutate the brushless DC motor after startup of the motor when the BEMF zero crossing condition is detected by the processor.

Abstract: A circuit is provided that includes summing circuit for comparing the PWM output signal to the PWM input signal and producing an increment signal if a value of the PWM input signal exceeds a corresponding value of the PWM output signal and producing a decrement signal if a value of the PWM input signal is less than a corresponding value of the PWM output signal. An integrator produces a duty cycle signal by producing an increase in value of the duty cycle signal in response to each increment signal and a decrease in value of the duty cycle signal in response to each decrement signal. A PWM generator produces the PWM output signal in response to the duty cycle signal to cause the duty cycle of the PWM output signal to equal the duty cycle of the PWM input signal with no loss of duty cycle resolution.

Abstract: A circuit is provided that includes summing circuit for comparing the PWM output signal to the PWM input signal and producing an increment signal if a value of the PWM input signal exceeds a corresponding value of the PWM output signal and producing a decrement signal if a value of the PWM input signal is less than a corresponding value of the PWM output signal. An integrator produces a duty cycle signal by producing an increase in value of the duty cycle signal in response to each increment signal and a decrease in value of the duty cycle signal in response to each decrement signal. A PWM generator produces the PWM output signal in response to the duty cycle signal to cause the duty cycle of the PWM output signal to equal the duty cycle of the PWM input signal with no loss of duty cycle resolution.