Patents by Inventor Russell Croman

Russell Croman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8750819
    Abstract: In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: June 10, 2014
    Assignee: Silicon Laboratories Inc.
    Inventors: Dan B Kasha, Jing Li, Russell Croman, Michael Johnson, Scott D. Willingham
  • Publication number: 20130303102
    Abstract: A long-wave or medium-wave receiver receives a first signal from a first terminal of a loopstick antenna on a positive antenna input terminal of the receiver and receives a second signal from a second terminal of the loopstick antenna on a negative antenna input terminal of the receiver. The first and second signals are processed differentially in the receiver. The receiver may optionally be configured to operate in either a differential mode or a single-ended mode by setting switches to selectively connect one of the antenna input terminals to ground in single-ended mode.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Inventors: Michael S. Johnson, Russell Croman, Scott D. Willingham
  • Patent number: 8548031
    Abstract: A tuner circuit includes circuitry to produce a first DSP frame based on a first RF signal and includes an inter-chip receiver circuit coupled to an inter-chip link and configured to receive an inter-chip frame. The inter-chip receiver circuit is configured to detect a start of frame symbol of the inter-chip frame and to extract a DSP offset and data related to a second DSP frame from the inter-chip frame. The tuner circuit further includes a digital signal processor coupled to the circuitry and to the inter-chip receiver circuit. The digital signal processor synchronizes the first DSP frame with the second DSP frame based on the start of frame symbol and the digital signal processor offset. The digital signal processor performs a selected antenna diversity operation on the first and second DSP frames to produce an output signal.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: October 1, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Younes Djadi, Russell Croman, Scott Thomas Haban, Javier Elenes
  • Publication number: 20130244600
    Abstract: In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.
    Type: Application
    Filed: May 13, 2013
    Publication date: September 19, 2013
    Inventors: Dan B. Kasha, Jing Li, Russell Croman, Michael Johnson, Scott D. WIllingham
  • Patent number: 8538365
    Abstract: In one embodiment, a method includes receiving and processing an incoming radio frequency (RF) signal in a receiver. Based on this signal, an environmental noise level can be determined, where this level corresponds to environmental noise present in an environment in which the receiver is located. Then, if the environmental noise level is substantially greater than receiver-generated noise, power consumption of at least one analog front end component of the receiver can be reduced.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 17, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Russell Croman, Christopher S. Gregg, Dan B. Kasha, Michael R. May, John Khoury, Javier Elenes
  • Patent number: 8463215
    Abstract: In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: June 11, 2013
    Assignee: Silicon Laboratories Inc.
    Inventors: Dan B. Kasha, Jing Li, Russell Croman, Michael Johnson, Scott D. Willingham
  • Publication number: 20130084818
    Abstract: In one embodiment, a method includes receiving and processing an incoming radio frequency (RF) signal in a receiver. Based on this signal, an environmental noise level can be determined, where this level corresponds to environmental noise present in an environment in which the receiver is located. Then, if the environmental noise level is substantially greater than receiver-generated noise, power consumption of at least one analog front end component of the receiver can be reduced.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Russell Croman, Christopher S. Gregg, Dan B. Kasha, Michael R. May, John Khoury, Javier Elenes
  • Patent number: 8331887
    Abstract: In an embodiment, a tuner circuit includes an inter-chip receiver circuit configurable to couple to a first inter-chip communication link to receive a first data stream and includes an analog-to-digital converter configured to convert a radio frequency signal into a digital version of the radio frequency signal. The tuner circuit further includes a digital signal processor coupled to the inter-chip receiver circuit and the analog-to-digital converter. The digital signal processor is configurable to generate an output signal related to at least one of the first data stream and the digital version of the radio frequency signal based on a selected operating mode.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: December 11, 2012
    Assignee: Silicon Laboratories Inc.
    Inventors: George Tyson Tuttle, Younes Djadi, Russell Croman, Scott Thomas Haban, Javier Elenes, Lokesh Duraiappah
  • Patent number: 8254862
    Abstract: In one embodiment, the present invention includes a single chip radio tuner, which may be adapted within an integrated circuit (IC). The tuner may be provided with a configurable front end to receive and process a radio frequency (RF) signal via a signal path. This configurable front end may be differently controlled depending on a particular radio implementation in which the tuner is adapted.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: August 28, 2012
    Assignee: Silicon Laboratories Inc.
    Inventors: Dan B. Kasha, Jing Li, Russell Croman, Michael Johnson, Scott D. Willingham
  • Patent number: 8184488
    Abstract: Systems and methods for controlling operation of an integrated circuit by applying below ground voltage to one or more pins of the integrated circuit, and in which the application of a below ground pin voltage may be employed as an initiator of (or condition for) a given mode of circuit operation in a manner that prevents the inadvertent initiation of the given mode of operation that may otherwise occur due to accidental application of an above ground voltage to one or more pins of the integrated circuit.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: May 22, 2012
    Assignee: Silicon Laboratories Inc.
    Inventors: Mike R. May, Russell Croman
  • Patent number: 8111204
    Abstract: In one embodiment, the present invention includes a slot antenna that is formed on a ground plane of a circuit board. The slot antenna may be connected to radio circuitry adapted on the circuit board by way of a feedline, which is coupled to the radio circuitry and across a portion of the slot antenna.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: February 7, 2012
    Assignee: Silicon Laboratories Inc.
    Inventor: Russell Croman
  • Publication number: 20110159829
    Abstract: In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.
    Type: Application
    Filed: December 29, 2009
    Publication date: June 30, 2011
    Inventors: Dan B. Kasha, Jing Li, Russell Croman, Michael Johnson, Scott D. Willingham
  • Publication number: 20110159828
    Abstract: In one embodiment, the present invention includes a single chip radio tuner, which may be adapted within an integrated circuit (IC). The tuner may be provided with a configurable front end to receive and process a radio frequency (RF) signal via a signal path. This configurable front end may be differently controlled depending on a particular radio implementation in which the tuner is adapted.
    Type: Application
    Filed: December 29, 2009
    Publication date: June 30, 2011
    Inventors: Dan B. Kasha, Jing Li, Russell Croman, Michael Johnson, Scott D. Willingham
  • Publication number: 20110158357
    Abstract: In an embodiment, a tuner circuit includes circuitry to produce a first DSP frame based on a first RF signal and includes an inter-chip receiver circuit coupled to an inter-chip link and configured to receive an inter-chip frame. The inter-chip receiver circuit is configured to detect a start of frame symbol of the inter-chip frame and to extract a DSP offset and data related to a second DSP frame from the inter-chip frame. The tuner circuit further includes a digital signal processor coupled to the circuitry and to the inter-chip receiver circuit. The digital signal processor is to synchronize the first DSP frame with the second DSP frame based on the start of frame symbol and the digital signal processor offset, the digital signal processor configured to perform a selected antenna diversity operation on the first and second DSP frames to produce an output signal.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: SILICON LABORATORIES INC.
    Inventors: Younes Djadi, Russell Croman, Scott Thomas Haban, Javier Elenes
  • Publication number: 20110158298
    Abstract: A tuner circuit includes a digital signal processor to generate a digital data stream related to a radio frequency signal and a transceiver circuit coupled to the digital signal processor and configurable to generate an inter-chip communication frame having a start portion and a plurality of channels. The plurality of channels includes a first data channel to carry a portion of the digital data stream and a control channel to carry control data. The transceiver circuit is configurable to send the inter-chip communication frame to an additional tuner circuit through an inter-chip communication link.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: SILICON LABORATORIES, INC.
    Inventors: Younes Djadi, Russell Croman, Scott Thomas Haban, Javier Elenes, Gerald Champagne, Michael Robert May
  • Publication number: 20110158339
    Abstract: In an embodiment, a tuner circuit includes an inter-chip receiver circuit configurable to couple to a first inter-chip communication link to receive a first data stream and includes an analog-to-digital converter configured to convert a radio frequency signal into a digital version of the radio frequency signal. The tuner circuit further includes a digital signal processor coupled to the inter-chip receiver circuit and the analog-to-digital converter. The digital signal processor is configurable to generate an output signal related to at least one of the first data stream and the digital version of the radio frequency signal based on a selected operating mode.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: SILICON LABORATORIES, INC.
    Inventors: George Tyson Tuttle, Younes Djadi, Russell Croman, Scott Thomas Haban, Javier Elenes, Lokesh Duraiappah
  • Publication number: 20110115537
    Abstract: Embodiments include circuit devices and methods for re-clocking an input signal. In an embodiment, a circuit device includes a data storage element having a data input to receive a digital data stream having a first clock rate and including a clock input to receive a clock signal having a second clock rate. The data storage element further includes logic to adjust edge timing of transitions within the digital data stream based on the clock signal to produce a modulated output signal having a power spectrum with spectral nulls at a desired frequency and its harmonics without changing an average data rate.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 19, 2011
    Applicant: SILICON LABORATORIES, INC.
    Inventors: Michael Robert May, Russell Croman, Younes Djadi, Scott Thomas Haban
  • Patent number: 7941194
    Abstract: Systems and methods are disclosed for the co-location of radio frequency (RF) antennas in portable devices, portable devices and their docking stations and related systems, and devices with restrictive space constraints to allow for simultaneous receive (RX) and transmit (TX) operation without degradation. The systems and methods disclosed overcome RX channel degradation, receiver performance, and other problems seen in prior solutions. More particularly, transmit and receive antennas are oriented to provide for cross-polarization of their electro-magnetic fields, are oriented to allow one or both antenna to fall within null regions of the other antenna, and/or oriented with both cross-polarization and null region considerations in mind. Other variations and implementations are also described.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: May 10, 2011
    Assignee: Silicon Laboratories Inc.
    Inventors: Nisha Ganwani, Greg Allan Hodgson, Russell Croman, Jonathan D. Pearce, Wade R. Gillham
  • Patent number: 7772934
    Abstract: A technique includes selecting one out of a plurality of frequency bands and providing a voltage controlled oscillator to generate a mixing signal for the selected frequency band. The technique includes adjusting a frequency gain of the voltage controlled oscillator based on the selected frequency band.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: August 10, 2010
    Assignee: Silicon Laboratories Inc.
    Inventors: Peter Vancorenland, Ramkishore Ganti, Russell Croman
  • Patent number: 7671560
    Abstract: In one embodiment, the present invention includes a method for performing a test on a rechargeable battery to indirectly determine a state of protection circuitry associated with the battery. The method may discharge the battery by controlling a pull-down current into a system, determine if the battery voltage falls below a first threshold level within a predetermined amount of time, and if so provide a pre-charge current to the battery.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: March 2, 2010
    Assignee: ST-Ericsson SA
    Inventors: Russell Croman, G. Diwakar Vishakhadatta, Lionel Cimaz