Abstract: In one embodiment, the present invention includes a slot antenna that is formed on a ground plane of a circuit board. The slot antenna may be connected to radio circuitry adapted on the circuit board by way of a feedline, which is coupled to the radio circuitry and across a portion of the slot antenna.

Abstract: Systems and methods are disclosed for the co-location of radio frequency (RF) antennas in portable devices, portable devices and their docking stations and related systems, and devices with restrictive space constraints to allow for simultaneous receive (RX) and transmit (TX) operation without degradation. The systems and methods disclosed overcome RX channel degradation, receiver performance, and other problems seen in prior solutions. More particularly, transmit and receive antennas are oriented to provide for cross-polarization of their electro-magnetic fields, are oriented to allow one or both antenna to fall within null regions of the other antenna, and/or oriented with both cross-polarization and null region considerations in mind. Other variations and implementations are also described.

Abstract: A method and apparatus is provided for use in a time domain isolated apparatus in which the operation of various radio-interfering circuits can be altered or controlled to mitigate levels of interference to the radio to acceptable levels based on current or predicted link requirements. Techniques are provided that allow some use of signal processing and other digital circuitry while the RF circuitry is operating.

Abstract: A method and apparatus is provided for use in a time domain isolated apparatus in which the operation of various radio-interfering circuits can be altered or controlled to mitigate levels of interference to the radio to acceptable levels based on current or predicted link requirements. Techniques are provided that allow some use of signal processing and other digital circuitry while the RF circuitry is operating.

Abstract: In one embodiment, the present invention includes a method for performing a test on a rechargeable battery to indirectly determine a state of protection circuitry associated with the battery. The method may discharge the battery by controlling a pull-down current into a system, determine if the battery voltage falls below a first threshold level within a predetermined amount of time, and if so provide a pre-charge current to the battery.

Abstract: A voltage regulator configured to receive a supply voltage from a voltage supply and provide a regulated voltage to digital circuitry is provided. The voltage regulator comprises first circuitry configured to inhibit high frequency energy generated by the digital circuitry from transmitting into the voltage supply, second circuitry configured to inhibit low frequency energy generated by the digital circuitry from transmitting into the voltage supply, and third circuitry configured to maintain the regulated voltage at a substantially constant value in response to a current drawn by the digital circuitry.

Abstract: A technique includes selecting one out of a plurality of frequency bands and providing a voltage controlled oscillator to generate a mixing signal for the selected frequency band. The technique includes adjusting a frequency gain of the voltage controlled oscillator based on the selected frequency band.

Abstract: A voltage regulator configured to receive a supply voltage from a voltage supply and provide a regulated voltage to digital circuitry is provided. The voltage regulator comprises first circuitry configured to inhibit high frequency energy generated by the digital circuitry from transmitting into the voltage supply, second circuitry configured to inhibit low frequency energy generated by the digital circuitry from transmitting into the voltage supply, and third circuitry configured to maintain the regulated voltage at a substantially constant value in response to a current drawn by the digital circuitry.

Abstract: A calibration circuitry includes an adjustable capacitor, a voltage generator, a reference voltage generator, and a controller. The reference voltage generator provides a reference voltage. The voltage generator provides a measurement voltage that depends on the capacitance of the adjustable capacitor. The capacitance of the adjustable capacitor varies in response to a control signal. The controller provides the control signal based on the relative values of the reference voltage and the measurement voltage.

Abstract: A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source.

Abstract: A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source. Isolation between load circuits coupled to the first and second bias sources is thus enhanced while providing low noise, stable operation.

Abstract: A high swing cascode bias circuit is provided for use within an integrated circuit. The bias circuit utilizes a start up transistor. The use of the start up transistor allows for high swing at the bias circuit outputs even though only one current source is provided from a reference bias circuit. The bias circuit may be powered down in response to a power down control signal. When the bias circuit is activated a plurality of bias signals may be provided to operating circuits of the integrated circuit.

Abstract: A calibration circuitry includes an adjustable capacitor, a voltage generator, a reference voltage generator, and a controller. The reference voltage generator provides a reference voltage. The voltage generator provides a measurement voltage that depends on the capacitance of the adjustable capacitor. The capacitance of the adjustable capacitor varies in response to a control signal. The controller provides the control signal based on the relative values of the reference voltage and the measurement voltage.

Abstract: A system and method is disclosed for calibrating comparators of an ADC. Individual comparators may be calibrated at random or psuedo-random times while the ADC is performing conversions without the addition of extra "proxy" or replacement comparators. More particularly, at periodic intervals a psuedo-random one of the comparators may be disconnected from the standard ADC circuitry for calibration. In order to prevent a significant degradation in the conversion quality, the digital logic downstream of the comparators may be designed to provide the necessary adjustments to accommodate for the removal of one of the comparators. Thus, a calibration technique is provided in which individual comparators are removed from the data conversion path during conversion and the downstream logic adjusts to accommodate for the removal of the comparator. The calibration technique is particularly advantageous for use with optical data storage systems.

Abstract: A system and method for correcting comparator offsets which occur during operating conditions such that static and dynamic offsets are compensated is provided. The comparator may be calibrated for normal operating conditions. The calibration may be accomplished by providing adjustability of the comparators' threshold value and providing a feedback loop for adjusting the threshold value. In one preferred embodiment, the comparator may be utilized within a flash ADC, and in a more preferred embodiment, the comparator may be utilized within a flash ADC of a read/write channel circuit.

Abstract: A system and method is provided having a flash analog-to-digital converter (ADC) that includes an input signal buffer, a plurality of identical voltage comparators, and a reference generator. A clock signal defines the time instances at which the instantaneous input signal voltage is compared against a plurality of reference voltages generated by the reference generator. The individual comparator consists of a an integrating amplifier stage followed by an analog latching stage and a digital latch. The integrating amplifier input is allowed to track the input signal continuously. The amplifier output voltage is forced to a voltage close to zero before each conversion cycle is initiated by the ADC clock. At the beginning of the conversion cycle, the amplifier output is released and its voltage will follow an excursion related to the integral of the input of the amplifier. At a predefined time moment later, the analog latch is activated.