Patents by Inventor Ryan Holmes
Ryan Holmes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240124422Abstract: The disclosure is directed to compounds of Formula I Pharmaceutical compositions comprising compounds of Formula I, as well as methods of their use and preparation, are also described.Type: ApplicationFiled: March 29, 2023Publication date: April 18, 2024Inventors: Chun Chen, Ryan Holmes, Soham Maity, Andrew P. Combs, Andrew W. Buesking, Sarah Pawley
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Publication number: 20240072032Abstract: A package comprising a first metallization portion, a first integrated device coupled to the first metallization portion through a first plurality of pillar interconnects, and a first chiplet located between the first integrated device and the first metallization portion. The first chiplet is coupled to the first integrated device through a first plurality of inter pillar interconnects. The first chiplet may include an active chiplet. The first chiplet may include a passive chiplet.Type: ApplicationFiled: August 23, 2022Publication date: February 29, 2024Inventors: Yanmei SONG, William STONE, Jianwen XU, Senthil SIVASWAMY, John HOLMES, Ryan LANE
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Publication number: 20240071993Abstract: A package comprising a first metallization portion, a first integrated device coupled to the first metallization portion, a second integrated device coupled to the first metallization portion, a second metallization portion coupled to the first metallization portion through a first plurality of pillar interconnects, a first chiplet located between the first metallization portion and the second metallization portion, wherein the first chiplet is configured to be electrically coupled to the first integrated device through the first metallization portion, and a second chiplet located between the first metallization portion and the second metallization portion, wherein the second chiplet is configured to be electrically coupled to the second integrated device through the first metallization portion.Type: ApplicationFiled: August 23, 2022Publication date: February 29, 2024Inventors: Yanmei SONG, William STONE, Jianwen XU, John HOLMES, Ryan LANE
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Patent number: 11901898Abstract: A disclosed apparatus for accomplishing such a task may include (1) a circuit board incorporated into a module designed for insertion into slots of computing devices, (2) at least one conductive contact disposed on the circuit board, (3) a counter circuit disposed on the circuit board and communicatively coupled to the conductive contact, wherein the counter circuit comprises (A) a signal-change detector that detects signal changes as the module is inserted into one of the slots of the computing devices and (B) a counter device that maintains a dynamic count indicative of a number of times that the module has been inserted into one of the slots of the computing devices based at least in part on the signal changes, (4) a battery electrically coupled to the counter circuit, wherein the battery powers the counter device prior to the insertion. Various other apparatuses, systems, and methods are also disclosed.Type: GrantFiled: August 4, 2022Date of Patent: February 13, 2024Assignee: Juniper Networks, Inc.Inventors: John Kenney, Bo Mi, Ryan Holmes
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Publication number: 20230357265Abstract: The disclosure is directed to compounds of Formula I Pharmaceutical compositions comprising compounds of Formula I, as well as methods of their use and preparation, are also described.Type: ApplicationFiled: March 16, 2023Publication date: November 9, 2023Inventors: Andrew W. Buesking, Andrew Paul Combs, Jincong Zhou, Ryan Holmes, Sarah Pawley, Xiaowei Wu
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Publication number: 20230291478Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.Type: ApplicationFiled: May 15, 2023Publication date: September 14, 2023Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
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Publication number: 20230254042Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.Type: ApplicationFiled: April 4, 2023Publication date: August 10, 2023Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffrey J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
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Patent number: 11685744Abstract: The disclosure is directed to compounds of Formula I Pharmaceutical compositions comprising compounds of Formula I, as well as methods of their use and preparation, are also described.Type: GrantFiled: September 21, 2021Date of Patent: June 27, 2023Assignee: Prelude Therapeutics IncorporatedInventors: Andrew W. Buesking, Andrew Paul Combs, Jincong Zhuo, Ryan Holmes, Sarah Pawley, Xiaowei Wu
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Patent number: 11689289Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.Type: GrantFiled: September 17, 2021Date of Patent: June 27, 2023Assignee: Juniper Networks, Inc.Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
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Publication number: 20230134891Abstract: A disclosed apparatus for accomplishing such a task may include (1) a circuit board incorporated into a module designed for insertion into slots of computing devices, (2) at least one conductive contact disposed on the circuit board, (3) a counter circuit disposed on the circuit board and communicatively coupled to the conductive contact, wherein the counter circuit comprises (A) a signal-change detector that detects signal changes as the module is inserted into one of the slots of the computing devices and (B) a counter device that maintains a dynamic count indicative of a number of times that the module has been inserted into one of the slots of the computing devices based at least in part on the signal changes, (4) a battery electrically coupled to the counter circuit, wherein the battery powers the counter device prior to the insertion. Various other apparatuses, systems, and methods are also disclosed.Type: ApplicationFiled: August 4, 2022Publication date: May 4, 2023Inventors: John Kenney, Bo Mi, Ryan Holmes
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Patent number: 11632175Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.Type: GrantFiled: September 9, 2021Date of Patent: April 18, 2023Assignee: Juniper Networks, Inc.Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffery J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
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Patent number: 11489528Abstract: A disclosed apparatus for accomplishing such a task may include (1) a circuit board incorporated into a module designed for insertion into slots of computing devices, (2) at least one conductive contact disposed on the circuit board, (3) a counter circuit disposed on the circuit board and communicatively coupled to the conductive contact, wherein the counter circuit comprises (A) a signal-change detector that detects signal changes as the module is inserted into one of the slots of the computing devices and (B) a counter device that maintains a dynamic count indicative of a number of times that the module has been inserted into one of the slots of the computing devices based at least in part on the signal changes, (4) a battery electrically coupled to the counter circuit, wherein the battery powers the counter device prior to the insertion. Various other apparatuses, systems, and methods are also disclosed.Type: GrantFiled: October 28, 2021Date of Patent: November 1, 2022Assignee: Juniper Networks, Inc.Inventors: John Kenney, Bo Mi, Ryan Holmes
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Publication number: 20220267345Abstract: The disclosure is directed to compounds of Formula I pharmaceutical compositions comprising compounds of Formula I, as well as methods of their use and preparation, are also described.Type: ApplicationFiled: December 17, 2021Publication date: August 25, 2022Inventors: Xiaowei Wu, Andrew W. Buesking, Andrew Paul Combs, Ryan Holmes, Sarah Pawley, Katarina Rohlfing
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Publication number: 20220103261Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.Type: ApplicationFiled: September 17, 2021Publication date: March 31, 2022Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
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Publication number: 20220089608Abstract: The disclosure is directed to compounds of Formula I Pharmaceutical compositions comprising compounds of Formula I, as well as methods of their use and preparation, are also described.Type: ApplicationFiled: September 21, 2021Publication date: March 24, 2022Inventors: Andrew W. Buesking, Andrew Paul Combs, Jincong Zhou, Ryan Holmes, Sarah Pawley, Xiaowei Wu
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Publication number: 20220052759Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.Type: ApplicationFiled: September 9, 2021Publication date: February 17, 2022Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffery J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
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Patent number: 11159240Abstract: A co-packaged optical-electrical chip can include an application-specific integrated circuit (ASIC) and a plurality of optical modules, such as optical transceivers. The ASIC and each of the optical modules can exchange electrical signaling via integrated electrical paths. The ASIC can include Ethernet switch, error correction, bit-to-symbol mapping/demapping, and digital signal processing circuits to pre-compensate and post-compensate channel impairments (e.g., inter-channel/intra-channel impairments) in electrical and optical domains. The co-packaged inter-chip interface can be scaled to handle different data rates using spectral efficient signaling formats (e.g., QAM-64, PAM-8) without adding additional data lines to a given design and without significantly increasing the power consumption of the design.Type: GrantFiled: September 30, 2020Date of Patent: October 26, 2021Assignee: Juniper Networks, Inc.Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes
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Patent number: 11159238Abstract: A sourceless co-packaged optical-electrical chip can include a plurality of different optical transceivers, each of which can transmit to an external destination or internal components. Each of the transceivers can be configured for a different modulation format, such as different pulse amplitude, phase shift key, and quadrature amplitude modulation formats. Different light sources provide light for processing by the transceivers, where the light source and transceivers can be configured for different applications (e.g., different distances) and data rates. An optical coupler can combine the light for the different transceivers for input into the sourceless co-packaged optical-electrical chip via a polarization maintaining media (e.g., polarization maintaining few mode fiber and polarization maintaining single mode fiber), where another coupler operates in splitting mode to separate the different channels of light for the different transceivers according to different co-packaged configurations.Type: GrantFiled: August 11, 2020Date of Patent: October 26, 2021Assignee: Juniper Networks, Inc.Inventors: Domenico Di Mola, Steven B. Alleston, Zhen Qu, Ryan Holmes, Jeffery J. Maki, Chul Soo Park, Yang Yue, Jon J. Anderson
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Patent number: 9384676Abstract: Described herein is a technology for facilitating skills-training mode in athletic sports that utilize a sporting-object. At least one implementation of that technology includes a rotational sensor configured to measure a series of angular velocities about a defined axis of a sporting object; a launch determiner configured to determine whether the sporting object is in a skills-training mode based upon one or more measured angular velocities of the series; and a trainer configured to both ascertain, during the skills-training mode, whether a consecutive sequence of measured angular velocities of the series falls within a defined range of angular velocities and generate an audible signal in response to the ascertainment.Type: GrantFiled: May 29, 2013Date of Patent: July 5, 2016Assignee: Shooters Revolution LLCInventors: Kingsley Costain, Ryan Holmes, Michael Johnson
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Publication number: 20140171226Abstract: Described herein is a technology for facilitating skills-training mode in athletic sports that utilize a sporting-object.Type: ApplicationFiled: May 29, 2013Publication date: June 19, 2014Inventors: Kingsley Costain, Ryan Holmes, Michael Johnson