Patents by Inventor Ryo Nakagawa

Ryo Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160118956
    Abstract: In a surface acoustic wave resonator, a first IDT electrode defining a first IDT and a second IDT electrode defining a second IDT are located on a first principal surface of a piezoelectric substrate. A direction of an electric field applied to the first IDT electrode and a direction of an electric field applied to the second IDT electrode are opposite to each other with respect to a direction of a projected axis resulting from projecting a c-axis of the piezoelectric substrate to the first principal surface of the piezoelectric substrate.
    Type: Application
    Filed: December 31, 2015
    Publication date: April 28, 2016
    Inventors: Takashi KIHARA, Kenichi UESAKA, Ryo NAKAGAWA
  • Publication number: 20160086511
    Abstract: To provide an electronic apparatus capable of performing determination processing for a calorie amount by a meal through easy input operation by performing discrimination processing for a mealtime based on time information received from a clocking unit. The electronic apparatus includes an input-information acquiring unit 110 that performs acquisition processing for input information on the basis of an input from a user, a time-information acquiring unit 120 that acquires time information from a clocking unit 130, a discriminating unit 140 that performs discrimination processing for a mealtime on the basis of the time information, and a processing unit 150 that calculates meal amount information on the basis of the input information acquired by the input-information acquiring unit 110 and performs calculation processing for a calorie amount by a meal on the basis of the calculated meal amount information and a result of the discrimination processing in the discriminating unit 140.
    Type: Application
    Filed: December 3, 2015
    Publication date: March 24, 2016
    Inventor: Ryo NAKAGAWA
  • Publication number: 20150186734
    Abstract: Based on an image captured by an onboard camera, an arrow signal detector sets an arrow signal area on the basis of a signal light distance between a lit red signal light of a traffic light and a vehicle equipped with the arrow signal recognition device, counts the number of color tone effective pixels assumed as being lit within each arrow signal area, further searches for and counts color tone ineffective pixels in the color tone effective pixels on the basis of pixel information on the vicinity of each color tone effective pixel, and calculates an arrow effective pixel number from the difference between the number of color tone effective pixels and the number of color tone ineffective pixels.
    Type: Application
    Filed: December 22, 2014
    Publication date: July 2, 2015
    Inventor: Ryo NAKAGAWA
  • Publication number: 20150177270
    Abstract: A wearable device wearable on a human body includes a counting unit configured to count, when tap operation is performed, the number of times of taps, which is the number of times of the tap operation, a number-of-times determining unit configured to determine whether the number of times of taps counted by the counting unit reaches a predetermined number of times equal to or greater than three times and equal to or less than ten times, and an executing unit configured to execute predetermined processing when the number-of-times determining unit determines that the number of times of taps reaches the predetermined number of times.
    Type: Application
    Filed: December 22, 2014
    Publication date: June 25, 2015
    Inventors: Yuichi TAKANO, Ryo NAKAGAWA
  • Publication number: 20150069882
    Abstract: A surface acoustic wave device includes a high acoustic velocity film in which a transversal wave propagates at a higher acoustic velocity than in a ScAlN film laminated on a substrate made of silicon or glass. The ScAlN film is laminated on the high acoustic velocity film, and IDT electrodes are laminated on the ScAlN film.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 12, 2015
    Inventors: Keiichi UMEDA, Ryo NAKAGAWA, Atsushi TANAKA
  • Publication number: 20140368401
    Abstract: A communication device is provided with a band elimination filter that has one end connected to an antenna terminal, and a first multiplexer that is connected to the other end of the band elimination filter. The band elimination filter is configured to eliminate signals of a frequency band that is different from the frequencies of signals transmitted and received in the first multiplexer, and is configured from a filter circuit that includes a bulk wave element.
    Type: Application
    Filed: September 3, 2014
    Publication date: December 18, 2014
    Inventors: Takashi MIYAKE, Koji NOSAKA, Ryo NAKAGAWA, Haruki KYOUYA
  • Patent number: 7982372
    Abstract: A piezoelectric transformer includes: a piezoelectric transducer on whose outer surface an electrode is formed; a case housing the piezoelectric transducer; a terminal disposed to face the electrode; an elastic member in contact with both the electrode and the terminal in the case and having conductivity to bring the electrode and the terminal into mutual continuity; and a folder formed in the case and fixedly holding the elastic member to press-fit the elastic member between the electrode and the terminal.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: July 19, 2011
    Assignee: Tamura Corporation
    Inventors: Akio Machida, Ryo Nakagawa, Yasuhide Matsuo
  • Publication number: 20110101461
    Abstract: The present invention presupposes a MIPS electrode in which a gate electrode of a MISFET is made up of a stacked film of a metal film and a polysilicon film. Then, by a first characteristic point that a gate contact hole is formed to have an opening diameter larger than a gate length of the gate electrode of the MIPS electrode and a second characteristic point that a concave portion is formed in a side surface of the metal film constituting the gate electrode, the further reduction of the gate resistance (parasitic resistance) and the improvement of the connection reliability between the gate electrode and the gate plug can be achieved.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 5, 2011
    Inventors: Masahiko TAKEUCHI, Ryo NAKAGAWA, Kazuo NAKAGAWA
  • Patent number: 7915131
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; active regions surrounded by the isolation region and including p-type and n-type regions, respectively; an NMOS transistor formed in the active region including the p-type region and including an n-type gate electrode; a PMOS transistor formed in the active region including the n-type region and including a p-type gate electrode; and a p-type resistor formed on the isolation region. The p-type resistor has an internal stress greater than that of the p-type gate electrode.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: March 29, 2011
    Assignee: Panasonic Corporation
    Inventors: Ryo Nakagawa, Takayuki Yamada
  • Publication number: 20110039379
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; active regions surrounded by the isolation region and including p-type and n-type regions, respectively; an NMOS transistor formed in the active region including the p-type region and including an n-type gate electrode; a PMOS transistor formed in the active region including the n-type region and including a p-type gate electrode; and a p-type resistor formed on the isolation region. The p-type resistor has an internal stress greater than that of the p-type gate electrode.
    Type: Application
    Filed: October 28, 2010
    Publication date: February 17, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Ryo NAKAGAWA, Takayuki Yamada
  • Patent number: 7843013
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; active regions surrounded by the isolation region and including p-type and n-type regions, respectively; an NMOS transistor formed in the active region including the p-type region and including an n-type gate electrode; a PMOS transistor formed in the active region including the n-type region and including a p-type gate electrode; and a p-type resistor formed on the isolation region. The p-type resistor has an internal stress greater than that of the p-type gate electrode.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: November 30, 2010
    Assignee: Panasonic Corporation
    Inventors: Ryo Nakagawa, Takayuki Yamada
  • Patent number: 7737480
    Abstract: A semiconductor memory device includes: a transistor formed in a substrate; a capacitor formed above one of source/drain regions of the transistor; a bit line formed above the substrate and extending in the gate length direction of the transistor; a first conductive plug connecting one of the source/drain regions and the capacitor; a second conductive plug connected to the other source/drain region that is not connected to the first conductive plug; and a third conductive plug formed on the second conductive plug and connected to the bit line. The central axis of the third conductive plug is displaced from the central axis of the second conductive plug in the gate width direction of the transistor.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: June 15, 2010
    Assignee: Panasonic Corporation
    Inventors: Ryo Nakagawa, Takashi Nakabayashi, Hideyuki Arai
  • Publication number: 20090146535
    Abstract: A piezoelectric transformer includes: a piezoelectric transducer on whose outer surface an electrode is formed; a case housing the piezoelectric transducer; a terminal disposed to face the electrode; an elastic member in contact with both the electrode and the terminal in the case and having conductivity to bring the electrode and the terminal into mutual continuity; and a folder formed in the case and fixedly holding the elastic member to press-fit the elastic member between the electrode and the terminal.
    Type: Application
    Filed: December 2, 2008
    Publication date: June 11, 2009
    Applicant: TAMURA CORPORATION
    Inventors: Akio MACHIDA, Ryo Nakagawa, Yasuhide Matsuo
  • Patent number: 7541738
    Abstract: A display unit in which viewing angle characteristics such as color shift and luminance unevenness depending on the viewing angle are improved and a manufacturing method thereof are provided. A display unit includes a driving panel having a plurality of light emitting devices arranged in a grid on a device substrate, a sealing panel including a sealing substrate, and a transparent resin layer which is sandwiched between the sealing panel and the driving panel. The transparent resin layer has a thickness L1 satisfying Mathematical formula 1 L 1 ? { ( L PITCH - ? L CF ) + ? ( L CF - ? L EL ) / ? 2 } + ? HK tan ? { sin - 1 ( 1 n ) } .
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: June 2, 2009
    Assignee: Sony Corporation
    Inventors: Ryo Nakagawa, Shinichiro Morikawa, Yuichi Iwase
  • Publication number: 20090026551
    Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; active regions surrounded by the isolation region and including p-type and n-type regions, respectively; an NMOS transistor formed in the active region including the p-type region and including an n-type gate electrode; a PMOS transistor formed in the active region including the n-type region and including a p-type gate electrode; and a p-type resistor formed on the isolation region. The p-type resistor has an internal stress greater than that of the p-type gate electrode.
    Type: Application
    Filed: June 18, 2008
    Publication date: January 29, 2009
    Inventors: Ryo Nakagawa, Takayuki Yamada
  • Patent number: 7453189
    Abstract: There is provided with a piezoelectric transformer which does not require a marking operation, is easy to manufacture, and is capable of reducing costs. After the piezoelectric transformer is manufactured, a shape of secondary side electrodes on the outer end is made so that a polarization direction can be recognized at the time of printing the secondary side electrodes without marking by a separate step to recognize the polarity on the primary side.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: November 18, 2008
    Assignee: Tamura Corporation
    Inventors: Ryo Nakagawa, Yasuhide Matsuo
  • Publication number: 20080035975
    Abstract: A semiconductor memory device includes: a transistor formed in a substrate; a capacitor formed above one of source/drain regions of the transistor; a bit line formed above the substrate and extending in the gate length direction of the transistor; a first conductive plug connecting one of the source/drain regions and the capacitor; a second conductive plug connected to the other source/drain region that is not connected to the first conductive plug; and a third conductive plug formed on the second conductive plug and connected to the bit line. The central axis of the third conductive plug is displaced from the central axis of the second conductive plug in the gate width direction of the transistor.
    Type: Application
    Filed: July 12, 2007
    Publication date: February 14, 2008
    Inventors: Ryo Nakagawa, Takashi Nakabayashi, Hideyuki Arai
  • Publication number: 20070103036
    Abstract: There is provided with a piezoelectric transformer which does not require a marking operation, is easy to manufacture, and is capable of reducing costs. After the piezoelectric transformer is manufactured, a shape of secondary side electrodes on the outer end is made so that a polarization direction can be recognized at the time of printing the secondary side electrodes without marking by a separate step to recognize the polarity on the primary side.
    Type: Application
    Filed: November 10, 2006
    Publication date: May 10, 2007
    Applicant: TAMURA CORPORATION
    Inventors: Ryo Nakagawa, Yasuhide Matsuo
  • Publication number: 20060043888
    Abstract: A display unit in which viewing angle characteristics such as color shift and luminance unevenness depending on the viewing angle are improved and a manufacturing method thereof are provided. A display unit includes a driving panel having a plurality of light emitting devices arranged in a grid on a device substrate, a sealing panel including a sealing substrate, and a transparent resin layer which is sandwiched between the sealing panel and the driving panel. The transparent resin layer has a thickness L1 satisfying Mathematical formula 1.
    Type: Application
    Filed: August 22, 2005
    Publication date: March 2, 2006
    Inventors: Ryo Nakagawa, Shinichiro Morikawa, Yuichi Iwase
  • Patent number: D605114
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: December 1, 2009
    Assignee: Tamura Corporation
    Inventors: Akio Machida, Ryo Nakagawa, Yasuhide Matsuo