Patents by Inventor Ryoji Hagiwara

Ryoji Hagiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7927769
    Abstract: A method for fabricating an extreme ultraviolet lithography (EUVL) mask. In an etching step, at least a part of an absorption layer of an EUVL mask is etched by allowing a charged particle to irradiate the absorption layer under feed of a halogenated xenon gas. In an oxidant feed step, an oxidant is fed to the absorption layer after the etching step to form an oxidized layer at a side surface of the absorption layer that is not etched during the etching step.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: April 19, 2011
    Assignee: SII Nanotechnology Inc.
    Inventors: Ryoji Hagiwara, Osamu Takaoka, Tomokazu Kozakai
  • Publication number: 20090226825
    Abstract: A method for fabricating EUVL mask, by which the pattern of absorption layer can be fabricated at a high precision is provided. The method includes an etching step of etching black defect of the absorption layer of the EUVL mask by the irradiation of ion beam on the absorption layer under feed of xenon fluoride gas and further includes an oxidant feed step for feeding oxidant gas to the absorption layer after the etching step, and the etching step and the oxidant feed step are alternately carried out at plural times.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 10, 2009
    Inventors: Ryoji Hagiwara, Osamu Takaoka, Tomokazu Kozakai
  • Patent number: 7576340
    Abstract: There is provided a focused ion beam processing method in which damage to a workpiece is minimized when the surface of the workpiece is irradiated and processed with an ion beam. The method comprises the steps of: generating an acceleration voltage between an ion source and a workpiece; focusing an ion beam emitted from the ion source; and applying the ion beam to a predetermined process position to process the surface of the workpiece. In this process, the energy level of the ion beam produced by the acceleration voltage is set within a range from at least 1 keV to less than 20 keV.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: August 18, 2009
    Assignee: SII Nano Technology Inc.
    Inventors: Ryoji Hagiwara, Yasuhiko Sugiyama, Tomokazu Kozakai
  • Patent number: 7488961
    Abstract: A computer sets a process area based on an image obtained by observing a mask, and determines the positions of representative points that form a contour of the process area for each pixel with sub-pixel accuracy that is better than a pixel, the position of each of the representative points being able to be set to either the center position of the pixel or a position displaced therefrom. Furthermore, for the pixels within the process area, the computer sets the center positions of the pixels as the representative points and corrects the positions of the representative points of the pixels within the process area on a sub-pixel basis such that nonuniformity between the representative points is reduced.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: February 10, 2009
    Assignee: SII NanoTechnology Inc.
    Inventors: Masashi Muramatsu, Tomokazu Kozakai, Ryoji Hagiwara
  • Patent number: 7485880
    Abstract: After a scan area for observing or processing a mask is set, a computer of the charged particle beam apparatus determines a plurality of scan lines in the scan area by the following steps of: setting a scan line along the outer circumference of the scan area; determining a scan line inside and along the thus set scan line; determining a scan line inside and along the thus determined scan line; and repeating the step of determining a scan line. After the scan lines are determined, the computer controls a scanning circuit to apply an ion beam to the scan lines while thinning out scan lines and/or pixels.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: February 3, 2009
    Assignee: SII NanoTechnology Inc.
    Inventors: Tomokazu Kozakai, Masashi Muramatsu, Ryoji Hagiwara
  • Patent number: 7375352
    Abstract: In order to make it possible to improve throughput of AFM scratch processing, enable correction of small defects in clear defect correction with a high degree of precision, and enable correction in a shorter period of time in the event of overcutting by AFM scratch processing, throughput of AFM scratch processing is increased by maximizing high-resolution of the electron beam device and minimizing the time taken in observations using a device incorporating both an electro-optical system and an AFM head in a vacuum, correcting small clear defects with high precision by eliminating portions left over from AFM scratch processing after applying a clear defect correction film using an electron beam while providing light-blocking film raw material, and correction in a short time is made possible by eliminating portions remaining using AFM scratch processing after applying a clear defect correction film using an electron beam while providing light-blocking film raw material also in cases of overcutting in AFM scratc
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: May 20, 2008
    Assignee: SII NanoTechnology Inc.
    Inventors: Osamu Takaoka, Ryoji Hagiwara
  • Publication number: 20070158590
    Abstract: There is provided a focused ion beam processing method in which damage to a workpiece is minimized when the surface of the workpiece is irradiated and processed with an ion beam. The method comprises the steps of: generating an acceleration voltage between an ion source and a workpiece; focusing an ion beam emitted from the ion source; and applying the ion beam to a predetermined process position to process the surface of the workpiece. In this process, the energy level of the ion beam produced by the acceleration voltage is set within a range from at least 1 keV to less than 20 keV.
    Type: Application
    Filed: October 3, 2006
    Publication date: July 12, 2007
    Inventors: Ryoji Hagiwara, Yasuhiko Sugiyama, Tomokazu Kozakai
  • Publication number: 20070114460
    Abstract: A reference area that contains a straight contour of a workpiece pattern is irradiated with a beam at a fixed interval to form images. The positions of the contour line in the images before and after a certain time of image formation are compared with each other and the amount of displacement between the positions is calculated. When the workpiece is processed, the beam is applied to the process position corrected by the amount of displacement.
    Type: Application
    Filed: October 10, 2006
    Publication date: May 24, 2007
    Inventors: Masashi Muramatsu, Tomokazu Kozakai, Ryoji Hagiwara
  • Publication number: 20070114454
    Abstract: After a scan area for observing or processing a mask is set, a computer of the charged particle beam apparatus determines a plurality of scan lines in the scan area by the following steps of: setting a scan line along the outer circumference of the scan area; determining a scan line inside and along the thus set scan line; determining a scan line inside and along the thus determined scan line; and repeating the step of determining a scan line. After the scan lines are determined, the computer controls a scanning circuit to apply an ion beam to the scan lines while thinning out scan lines and/or pixels.
    Type: Application
    Filed: October 25, 2006
    Publication date: May 24, 2007
    Inventors: Tomokazu Kozakai, Masashi Muramatsu, Ryoji Hagiwara
  • Publication number: 20070114462
    Abstract: A computer sets a process area based on an image obtained by observing a mask, and determines the positions of representative points that form a contour of the process area for each pixel with sub-pixel accuracy that is better than a pixel, the position of each of the representative points being able to be set to either the center position of the pixel or a position displaced therefrom. Furthermore, for the pixels within the process area, the computer sets the center positions of the pixels as the representative points and corrects the positions of the representative points of the pixels within the process area on a sub-pixel basis such that nonuniformity between the representative points is reduced.
    Type: Application
    Filed: October 25, 2006
    Publication date: May 24, 2007
    Inventors: Masashi Muramatsu, Tomokazu Kozakai, Ryoji Hagiwara
  • Patent number: 7018683
    Abstract: A microscopic projection or a characteristic pattern are formed in the vicinity of a region to be processed before processing using electron beam CVD, during processing an image of a region containing the projection or pattern formed by electron beam CVD is captured to obtain a current position of the projection or pattern, a difference between the position before staring and the current position is treated as a drift amount and processing is restarted at a region that has been subjected to microscopic adjustment of the electron irradiation region.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: March 28, 2006
    Assignee: SII NanoTechnology Inc.
    Inventors: Osamu Takaoka, Ryoji Hagiwara
  • Publication number: 20050285033
    Abstract: In order to make it possible to improve throughput of AFM scratch processing, enable correction of small defects in clear defect correction with a high degree of precision, and enable correction in a shorter period of time in the event of overcutting by AFM scratch processing, throughput of AFM scratch processing is increased by maximizing high-resolution of the electron beam device and minimizing the time taken in observations using a device incorporating both an electro-optical system and an AFM head in a vacuum, correcting small clear defects with high precision by eliminating portions left over from AFM scratch processing after applying a clear defect correction film using an electron beam while providing light-blocking film raw material, and correction in a short time is made possible by eliminating portions remaining using AFM scratch processing after applying a clear defect correction film using an electron beam while providing light-blocking film raw material also in cases of overcutting in AFM scratc
    Type: Application
    Filed: May 25, 2005
    Publication date: December 29, 2005
    Inventors: Osamu Takaoka, Ryoji Hagiwara
  • Publication number: 20050276932
    Abstract: A microscopic projection or a characteristic pattern are formed in the vicinity of a region to be processed before processing using electron beam CVD, during processing an image of a region containing the projection or pattern formed by electron beam CVD is captured to obtain a current position of the projection or pattern, a difference between the position before staring and the current position is treated as a drift amount and processing is restarted at a region that has been subjected to microscopic adjustment of the electron irradiation region.
    Type: Application
    Filed: June 15, 2004
    Publication date: December 15, 2005
    Inventors: Osamu Takaoka, Ryoji Hagiwara
  • Patent number: 6891171
    Abstract: A method is provided for repairing a phase shift mask. The phase shift mask has a substrate and a shifter containing a defect and disposed on the substrate. An ion beam is irradiated onto the defect while a region of the shifter that includes the defect is supplied with a first gas containing silicon, an oxidizing second gas, and a third gas for controlling an amount of ions from the ion beam which penetrate the region of the shifter to form a silicon thin film on the defect and thereby repair the phase shift mask.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: May 10, 2005
    Assignee: SII NanoTechnology Inc.
    Inventors: Ryoji Hagiwara, Yoshihiro Koyama
  • Patent number: 6780551
    Abstract: In the processing method of the present invention, there is implemented irradiation with a charged particle beam in such a manner that, when executing processing in a uniform manner, when deposition processing or etching processing of a prescribed pattern is carried out using a charged particle beam apparatus, a region of the pattern to be processed is divided up into microscopic regions corresponding to the diameter of the beam, and regulation is performed by scanning circuits etc. with processing proceeding simultaneously for a plurality of patterns within the scanning region in such a manner that the dose amount for each microscopic region becomes equal.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: August 24, 2004
    Assignee: SII NanoTechnology Inc.
    Inventors: Ryoji Hagiwara, Tomokazu Kozakai
  • Publication number: 20020177055
    Abstract: In the processing method of the present invention, there is implemented irradiation with a charged particle beam in such a manner that, when executing processing in a uniform manner, when deposition processing or etching processing of a prescribed pattern is carried out using a charged particle beam apparatus, a region of the pattern to be processed is divided up into microscopic regions corresponding to the diameter of the beam, and regulation is performed by scanning circuits etc. with processing proceeding simultaneously for a plurality of patterns within the scanning region in such a manner that the dose amount for each microscopic region becomes equal.
    Type: Application
    Filed: December 13, 2001
    Publication date: November 28, 2002
    Inventors: Ryoji Hagiwara, Tomokazu Kozakai
  • Patent number: 6303930
    Abstract: An optical observing apparatus has a sample stage for moving a sample to a desired location to be operated upon at a target position by a charged particle beam apparatus so that the target position can be visually observed, an optical observation system for magnifying the sample for visual observation of the target position, a marking system for moving the sample based on the visual observation and marking the sample at one or more locations from which the target position can be determined without the need for further visual observation so that the target position may be located by the charged particle beam apparatus even when the target position can not be visually observed by use of the charged particle beam apparatus, and a control system for storing the target position and the location of the one or more markings together with an optical observation image and corresponding stage coordinate.
    Type: Grant
    Filed: May 13, 1999
    Date of Patent: October 16, 2001
    Assignee: Seiko Instruments Inc.
    Inventor: Ryoji Hagiwara
  • Patent number: 5770963
    Abstract: A flash memory performs channel erasing or source erasing by applying a negative voltage to a control gate. The device includes a voltage restriction device which restricts the negative voltage to be applied to the control gate so that the negative voltage will be a constant value relative to the voltage of the channel or source. Alternatively, two voltage restricting devices restrict the negative voltage applied to the control gate and the voltage to be applied to the source so that the voltages will be a constant value relative to a common reference voltage.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: June 23, 1998
    Assignee: Fujitsu Limited
    Inventors: Takao Akaogi, Hiromi Kawashima, Tetsuji Takeguchi, Ryoji Hagiwara, Yasushi Kasa, Kiyoshi Itano, Yasushige Ogawa, Shouichi Kawamura
  • Patent number: 5631597
    Abstract: A negative-voltage circuit for realizing a flash memory is installed independently and is applied selectively to word lines in response to signals sent from row decoders. Row decoders for specifying word lines need not be installed in the negative voltage circuit. The negative circuit can therefore be reduced in scale.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: May 20, 1997
    Assignee: Fujitsu Limited
    Inventors: Takao Akaogi, Hiromi Kawashima, Tetsuji Takeguchi, Ryoji Hagiwara, Yasushi Kasa, Kiyoshi Itano, Yasushige Ogawa, Shouichi Kawamura
  • Patent number: 5608670
    Abstract: The present invention relates to improvements in erasing a flash memory. An object of the present invention is to shorten the erasing time. During pre-erase writing, at least either word lines or bit lines are selected in units of multiple lines at a time, and data are written in multiple selective transistors simultaneously.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: March 4, 1997
    Assignee: Fujitsu Limited
    Inventors: Takao Akaogi, Hiromi Kawashima, Tetsuji Takeguchi, Ryoji Hagiwara, Yasushi Kasa, Kiyoshi Itano, Yasushige Ogawa, Shouichi Kawamura