Patents by Inventor Ryota Imahayashi
Ryota Imahayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8049206Abstract: It is an object to provide an organic field effect transistor including an electrode which can reduce an energy barrier at an interface between a conductive layer and a semiconductor layer, and a semiconductor device including the organic field effect transistor. A composite layer containing an organic compound and an inorganic compound is provided in at least part of one of a source electrode and a drain electrode in an organic field effect transistor, and as the organic compound, a carbazole derivative represented by the general formula (1) is used. By providing the composite layer in at least part of one of the source electrode and the drain electrode, an energy barrier at an interface between a conductive layer and a semiconductor layer can be reduced.Type: GrantFiled: January 25, 2007Date of Patent: November 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinobu Furukawa, Ryota Imahayashi, Kaoru Kato
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Publication number: 20110240985Abstract: There have been problems in that a dedicated apparatus is needed for a conventional method of manufacturing an organic thin film transistor and in that: a little amount of an organic semiconductor film is formed with respect to a usage amount of a material; and most of the used material is discarded. Further, apparatus maintenance such as cleaning of the inside of an apparatus cup or chamber has needed to be frequently carried out in order to remove the contamination resulting from the material that is wastefully discarded. Therefore, a great cost for materials and man-hours for maintenance of apparatus have been required. In the present invention, a uniform organic semiconductor film is formed by forming an aperture between a first substrate for forming the organic semiconductor film and a second substrate used for injection with an insulating film formed at a specific spot and by injecting an organic semiconductor film material into the aperture due to capillarity to the aperture.Type: ApplicationFiled: June 15, 2011Publication date: October 6, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshiharu HIRAKATA, Tetsuji ISHITANI, Shuji FUKAI, Ryota IMAHAYASHI
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Publication number: 20110237034Abstract: In manufacturing a device using an organic TFT, it is essential to develop an element in which a channel length is short or a channel width is narrow to downsize a device. Based on the above, it is an object of the present invention to provide an organic TFT in which characteristic is improved. In view of the foregoing problem, one feature of the present invention is that an element is baked after an organic semiconductor film is deposited. More specifically, one feature of the present invention is that the organic semiconductor film is heated under atmospheric pressure or under reduced pressure. Moreover, a baking process may be carried out in an inert gas atmosphere.Type: ApplicationFiled: June 6, 2011Publication date: September 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshiharu HIRAKATA, Tetsuji ISHITANI, Shuji FUKAI, Ryota IMAHAYASHI
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Publication number: 20110220891Abstract: A semiconductor device includes a wiring embedded in an insulating layer, an oxide semiconductor layer over the insulating layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate electrode provided to overlap with the oxide semiconductor layer, and a gate insulating layer provided between the oxide semiconductor layer and the gate electrode. The insulating layer is formed so that part of a top surface of the wiring is exposed. The part of the top surface of the wiring is positioned higher than part of a surface of the insulating layer. The wiring in a region exposed from the insulating layer is electrically connected to the source electrode or the drain electrode. The root-mean-square roughness of a region which is part of the surface of the insulating layer and in contact with the oxide semiconductor layer is 1 nm or less.Type: ApplicationFiled: March 3, 2011Publication date: September 15, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Teruyuki FUJII, Ryota IMAHAYASHI
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Publication number: 20110215326Abstract: Disclosed is a semiconductor device including: an insulating layer; a source electrode and a drain electrode embedded in the insulating layer; an oxide semiconductor layer in contact and over the insulating layer, the source electrode, and the drain electrode; a gate insulating layer over and covering the oxide semiconductor layer; and a gate electrode over the gate insulating layer, where the upper surfaces of the insulating layer, the source electrode, and the drain electrode exist coplanarly. The upper surface of the insulating layer, which is in contact with the oxide semiconductor layer, has a root-mean-square (RMS) roughness of 1 nm or less, and the difference in height between the upper surface of the insulating layer and the upper surface of the source electrode or the drain electrode is less than 5 nm. This structure contributes to the suppression of defects of the semiconductor device and enables their miniaturization.Type: ApplicationFiled: March 1, 2011Publication date: September 8, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hiromichi GODO, Ryota IMAHAYASHI, Kiyoshi KATO
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Patent number: 7985967Abstract: There have been problems in that a dedicated apparatus is needed for a conventional method of manufacturing an organic thin film transistor and in that: a little amount of an organic semiconductor film is formed with respect to a usage amount of a material; and most of the used material is discarded. Further, apparatus maintenance such as cleaning of the inside of an apparatus cup or chamber has needed to be frequently carried out in order to remove the contamination resulting from the material that is wastefully discarded. Therefore, a great cost for materials and man-hours for maintenance of apparatus have been required. In the present invention, a uniform organic semiconductor film is formed by forming an aperture between a first substrate for forming the organic semiconductor film and a second substrate used for injection with an insulating film formed at a specific spot and by injecting an organic semiconductor film material into the aperture due to capillarity to the aperture.Type: GrantFiled: October 26, 2009Date of Patent: July 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiharu Hirakata, Tetsuji Ishitani, Shuji Fukai, Ryota Imahayashi
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Patent number: 7977150Abstract: In manufacturing a device using an organic TFT, it is essential to develop an element in which a channel length is short or a channel width is narrow to downsize a device. Based on the above, it is an object of the present invention to provide an organic TFT in which characteristic is improved. In view of the foregoing problem, one feature of the present invention is that an element is baked after an organic semiconductor film is deposited. More specifically, one feature of the present invention is that the organic semiconductor film is heated under atmospheric pressure or under reduced pressure. Moreover, a baking process may be carried out in an inert gas atmosphere.Type: GrantFiled: January 6, 2010Date of Patent: July 12, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiharu Hirakata, Tetsuji Ishitani, Shuji Fukai, Ryota Imahayashi
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Publication number: 20110111555Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.Type: ApplicationFiled: January 20, 2011Publication date: May 12, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shinobu FURUKAWA, Ryota IMAHAYASHI
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Patent number: 7919772Abstract: A nonvolatile memory has a problem in that applied voltage is high. This is because a carrier needs to be injected into a floating gate through an insulating film by a tunneling effect. In addition, there is concern about deterioration of the insulating film by performing such carrier injection. An object of the present invention is to provide a memory in which applied voltage is lowered and deterioration of an insulating film is prevented. One feature is to use a layer in which an inorganic compound having a charge-transfer complex is mixed with an organic compound as a layer functioning as a floating gate of a memory. A specific example is an element having a transistor structure where a layer in which an inorganic compound having a charge-transfer complex is mixed with an organic compound and which is sandwiched between insulating layers is used as a floating gate.Type: GrantFiled: December 8, 2005Date of Patent: April 5, 2011Assignee: Semiconductor Energy laboratory Co., Ltd.Inventors: Shinobu Furukawa, Ryota Imahayashi
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Publication number: 20110065263Abstract: It is an object of the invention is to provide a method suitable for reprocessing a semiconductor substrate having favorable planarity. Another object of the invention is to manufacture a reprocessed semiconductor substrate by using the method suitable for reprocessing a semiconductor substrate having favorable planarity, and to manufacture an SOI substrate by using the reprocessed semiconductor substrate. A projecting portion of a semiconductor substrate is removed using a method capable of selectively removing a semiconductor region which is damaged by ion irradiation or the like. Further, an oxide film is formed on a surface of the semiconductor substrate when the semiconductor substrate is planarized by a polishing treatment typified by a CMP method, whereby the semiconductor substrate is evenly polished at a uniform rate. Moreover, a reprocessed semiconductor substrate is manufactured using the aforementioned method, and an SOI substrate is manufactured using the reprocessed semiconductor substrate.Type: ApplicationFiled: August 19, 2010Publication date: March 17, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Ryota IMAHAYASHI, Hideto OHNUMA
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Patent number: 7875494Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.Type: GrantFiled: February 4, 2010Date of Patent: January 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinobu Furukawa, Ryota Imahayashi
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Publication number: 20100297809Abstract: It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm?3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.Type: ApplicationFiled: August 5, 2010Publication date: November 25, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Ryota IMAHAYASHI, Shinobu FURUKAWA, Atsuo ISOBE, Yasuyuki ARAI, Shunpei YAMAZAKI
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Publication number: 20100203706Abstract: It is an object of the present invention is to provide a method of manufacturing an SOI substrate provided with a single-crystal semiconductor layer which can be practically used even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like, is used, and further, to manufacture a semiconductor device with high reliability by using such an SOI substrate. A semiconductor layer which is separated from a semiconductor substrate and bonded to a supporting substrate having an insulating surface is irradiated with electromagnetic waves, and the surface of the semiconductor layer is subjected to polishing treatment. At least part of a region of the semiconductor layer is melted by irradiation with electromagnetic waves, and a crystal defect in the semiconductor layer can be reduced. Further, the surface of the semiconductor layer can be polished and planarized by polishing treatment.Type: ApplicationFiled: April 19, 2010Publication date: August 12, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideto OHNUMA, Ryota IMAHAYASHI, Yoichi IIKUBO, Kenichiro MAKINO, Sho NAGAMATSU
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Patent number: 7749804Abstract: It is an object of the present invention to provide a method for manufacturing an inexpensive organic TFT which does not depend on an expensive dedicated device and does not expose an organic semiconductor to atmospheric air. Moreover, it is another object of the present invention to provide a method for manufacturing an organic TFT at low temperature so as not to cause a problem of pyrolyzing a material. In view of the foregoing problems, one feature of the present invention is that a film-like protector which serves as a protective film is provided over an organic semiconductor film. The film-like protector can be formed by being fixed to a film-like support body with an adhesive agent or the like.Type: GrantFiled: April 28, 2009Date of Patent: July 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiharu Hirakata, Tetsuji Ishitani, Shuji Fukai, Ryota Imahayashi
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Publication number: 20100151621Abstract: In manufacturing a device using an organic TFT, it is essential to develop an element in which a channel length is short or a channel width is narrow to downsize a device. Based on the above, it is an object of the present invention to provide an organic TFT in which characteristic is improved. In view of the foregoing problem, one feature of the present invention is that an element is baked after an organic semiconductor film is deposited. More specifically, one feature of the present invention is that the organic semiconductor film is heated under atmospheric pressure or under reduced pressure. Moreover, a baking process may be carried out in an inert gas atmosphere.Type: ApplicationFiled: January 6, 2010Publication date: June 17, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshiharu HIRAKATA, Tetsuji ISHITANI, Shuji FUKAI, Ryota IMAHAYASHI
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Publication number: 20100136740Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.Type: ApplicationFiled: February 4, 2010Publication date: June 3, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shinobu FURUKAWA, Ryota IMAHAYASHI
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Patent number: 7727846Abstract: It is an object of the present invention is to provide a method of manufacturing an SOI substrate provided with a single-crystal semiconductor layer which can be practically used even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like, is used, and further, to manufacture a semiconductor device with high reliability by using such an SOI substrate. A semiconductor layer which is separated from a semiconductor substrate and bonded to a supporting substrate having an insulating surface is irradiated with electromagnetic waves, and the surface of the semiconductor layer is subjected to polishing treatment. At least part of a region of the semiconductor layer is melted by irradiation with electromagnetic waves, and a crystal defect in the semiconductor layer can be reduced. Further, the surface of the semiconductor layer can be polished and planarized by polishing treatment.Type: GrantFiled: June 16, 2008Date of Patent: June 1, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Hideto Ohnuma, Ryota Imahayashi, Yoichi Iikubo, Kenichiro Makino, Sho Nagamatsu
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Publication number: 20100062546Abstract: An object of the present invention is to improve use efficiency of a semiconductor substrate without lowering efficiency of a fabrication process. Another object of the present invention is to achieve cost reduction by effective use of a semiconductor substrate whose thickness is reduced due to repeated use in a process of manufacturing an SOI substrate. In a process of manufacturing an SOI substrate, a semiconductor substrate is used as a bond substrate a predetermined number of times, or as long as it meets predetermined conditions. In a case where a first single crystal semiconductor substrate cannot be used as a bond substrate, it is bonded to a second single crystal semiconductor substrate. Then, a stacked-layer substrate formed from the first single crystal semiconductor substrate and the second single crystal semiconductor substrate bonded to each other is used as a bond substrate in a process of manufacturing an SOI substrate.Type: ApplicationFiled: August 31, 2009Publication date: March 11, 2010Inventors: Yuta ENDO, Ryota IMAHAYASHI, Ryosuke MURATA
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Patent number: 7671448Abstract: It is an object of the present invention to form an organic transistor including an organic semiconductor having high crystallinity without loosing an interface between an organic semiconductor of a channel where carriers are spread out and a gate insulating layer and deteriorating a yield. A semiconductor device according to the present invention has a stacked structure of organic semiconductor layers, and at least the upper organic semiconductor layer is in a polycrystalline or a single crystalline state and the lower organic semiconductor layer is made of a material serving as a channel. Carrier mobility can be increased owing to the upper organic semiconductor layer having high crystallinity; thus, insufficient contact due to the upper organic semiconductor layer can be compensated by the lower organic semiconductor layer.Type: GrantFiled: March 16, 2006Date of Patent: March 2, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinobu Furukawa, Ryota Imahayashi
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Publication number: 20100038636Abstract: There have been problems in that a dedicated apparatus is needed for a conventional method of manufacturing an organic thin film transistor and in that: a little amount of an organic semiconductor film is formed with respect to a usage amount of a material; and most of the used material is discarded. Further, apparatus maintenance such as cleaning of the inside of an apparatus cup or chamber has needed to be frequently carried out in order to remove the contamination resulting from the material that is wastefully discarded. Therefore, a great cost for materials and man-hours for maintenance of apparatus have been required. In the present invention, a uniform organic semiconductor film is formed by forming an aperture between a first substrate for forming the organic semiconductor film and a second substrate used for injection with an insulating film formed at a specific spot and by injecting an organic semiconductor film material into the aperture due to capillarity to the aperture.Type: ApplicationFiled: October 26, 2009Publication date: February 18, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshiharu Hirakata, Tetsuji Ishitani, Shuji Fukai, Ryota Imahayashi