Patents by Inventor Ryuji Hada
Ryuji Hada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948225Abstract: An image processing apparatus in an embodiment includes a FIFO memory, a plurality of line buffers, an image processing circuit, and a control circuit. The plurality of line buffers store data inputted from a plurality of cameras. The image processing circuit performs predetermined image processing on the data stored in the plurality of line buffers. The control circuit performs control, according to an output control signal, such that output of data to the plurality of line buffers is stopped and the data stopped from being outputted is stored in the FIFO memory.Type: GrantFiled: March 12, 2021Date of Patent: April 2, 2024Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Ryuji Hada, Atsushi Masuda
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Patent number: 11616908Abstract: An image processing apparatus according to an embodiment includes a preprocessing circuit and a distortion correction circuit configured to process, in a time division manner, a plurality of images generated by a plurality of image pickup units and an output buffer circuit configured to buffer the processed plurality of images in a unit of a block and add an identification tag including an address and an identification ID to the block.Type: GrantFiled: March 12, 2021Date of Patent: March 28, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Ryuji Hada, Atsushi Masuda
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Patent number: 11336822Abstract: According to one embodiment, an image processing device includes buffer circuitry, calculation circuitry, and control circuitry. The buffer circuitry includes n buffer circuits corresponding to each of n cameras, and stores pixel data sequentially output from each of the n cameras. The calculation circuitry reads, as line image data, a pixel data group for one line which is stored in one buffer circuit, and generates frame image data using data obtained by performing image processing on the line image data. The control circuitry stores the pixel data from a certain camera in a certain buffer circuit, and selectively sets a read destination of the pixel data as a base of the line image data to any one of the buffer circuits in which the pixel data not subjected to the image processing is stored.Type: GrantFiled: February 5, 2020Date of Patent: May 17, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Ryuji Hada
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Publication number: 20220092726Abstract: An image processing apparatus in an embodiment includes a FIFO memory, a plurality of line buffers, an image processing circuit, and a control circuit. The plurality of line buffers store data inputted from a plurality of cameras. The image processing circuit performs predetermined image processing on the data stored in the plurality of line buffers. The control circuit performs control, according to an output control signal, such that output of data to the plurality of line buffers is stopped and the data stopped from being outputted is stored in the FIFO memory.Type: ApplicationFiled: March 12, 2021Publication date: March 24, 2022Inventors: Ryuji Hada, Atsushi Masuda
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Publication number: 20220086342Abstract: An image processing apparatus according to an embodiment includes a preprocessing circuit and a distortion correction circuit configured to process, in a time division manner, a plurality of images generated by a plurality of image pickup units and an output buffer circuit configured to buffer the processed plurality of images in a unit of a block and add an identification tag including an address and an identification ID to the block.Type: ApplicationFiled: March 12, 2021Publication date: March 17, 2022Inventors: Ryuji Hada, Atsushi Masuda
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Patent number: 11076092Abstract: An image processing apparatus includes first and second line buffers, an image processing circuit configured to perform an image processing on first pixel data stored in the first line buffer and then second pixel data stored in the second line buffer, and a controller configured to control writing of the second pixel data in the second line buffer at a timing aligned with a synchronizing signal and reading of the second pixel data written in the second line buffer for the image processing by the image processing circuit at a timing of a completion of the image processing by the image processing circuit of the first pixel data stored in the first line buffer.Type: GrantFiled: February 26, 2019Date of Patent: July 27, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Ryuji Hada, Atsushi Masuda
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Patent number: 11024015Abstract: An image processing apparatus includes an input buffer, a processor configured to convert a position of an input pixel of an input image received into the input buffer into a first pixel position of an output image using a first conversion function, convert a position of an output pixel in a vicinity of the first pixel position of the output image into a second pixel position of the input image using a second conversion function, calculate a pixel value of the second pixel position by interpolation using pixels of the input image that are in a vicinity of the second pixel position of the input image, and output the position of the output pixel as a corrected position of the input pixel and the calculated pixel value as a pixel value at the corrected position.Type: GrantFiled: August 30, 2019Date of Patent: June 1, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Ryuji Hada
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Publication number: 20210067688Abstract: According to one embodiment, an image processing device includes buffer circuitry, calculation circuitry, and control circuitry. The buffer circuitry includes n buffer circuits corresponding to each of n cameras, and stores pixel data sequentially output from each of the n cameras. The calculation circuitry reads, as line image data, a pixel data group for one line which is stored in one buffer circuit, and generates frame image data using data obtained by performing image processing on the line image data. The control circuitry stores the pixel data from a certain camera in a certain buffer circuit, and selectively sets a read destination of the pixel data as a base of the line image data to any one of the buffer circuits in which the pixel data not subjected to the image processing is stored.Type: ApplicationFiled: February 5, 2020Publication date: March 4, 2021Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Ryuji HADA
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Publication number: 20200294208Abstract: An image processing apparatus includes an input buffer, a processor configured to convert a position of an input pixel of an input image received into the input buffer into a first pixel position of an output image using a first conversion function, convert a position of an output pixel in a vicinity of the first pixel position of the output image into a second pixel position of the input image using a second conversion function, calculate a pixel value of the second pixel position by interpolation using pixels of the input image that are in a vicinity of the second pixel position of the input image, and output the position of the output pixel as a corrected position of the input pixel and the calculated pixel value as a pixel value at the corrected position.Type: ApplicationFiled: August 30, 2019Publication date: September 17, 2020Inventor: Ryuji HADA
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Patent number: 10659746Abstract: The image processing device of an embodiment, to which multiple inputted pixels forming an inputted image are inputted in a raster scan order, includes a written pixel position calculating circuit configured to convert the position of each of the inputted pixels to a first pixel position in an outputted image, a read-out pixel position calculating circuit configured to convert the position of an outputted pixel near the first pixel position in the outputted image to a second pixel position in the inputted image, and a pixel interpolating circuit configured to calculate the pixel value of the second pixel position through interpolation with surrounding pixels in the inputted image.Type: GrantFiled: January 26, 2018Date of Patent: May 19, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Ryuji Hada, Atsushi Masuda
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Patent number: 10652487Abstract: An image processing apparatus of an embodiment includes: a distortion correction circuit configured to perform a correction operation to a plurality of pixels composing an input image; a plurality of output buffers layered to two or more stages configured to receive an output of the distortion correction circuit, and perform output for each transmission block which is a set of pixels with the consecutive corrected pixel positions; and a controller configured to write an output pixel of the distortion correction circuit in the first-stage output buffer, sequentially transfer the written pixel to a post-stage output buffer, and cause output buffers at respective stages to store pixels of sub-blocks into which the transmission block is divided.Type: GrantFiled: September 5, 2018Date of Patent: May 12, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Ryuji Hada
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Publication number: 20200092467Abstract: An image processing apparatus includes first and second line buffers, an image processing circuit configured to perform an image processing on first pixel data stored in the first line buffer and then second pixel data stored in the second line buffer, and a controller configured to control writing of the second pixel data in the second line buffer at a timing aligned with a synchronizing signal and reading of the second pixel data written in the second line buffer for the image processing by the image processing circuit at a timing of a completion of the image processing by the image processing circuit of the first pixel data stored in the first line buffer.Type: ApplicationFiled: February 26, 2019Publication date: March 19, 2020Inventors: Ryuji HADA, Atsushi MASUDA
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Publication number: 20190289231Abstract: An image processing apparatus of an embodiment includes: a distortion correction circuit configured to perform a correction operation to a plurality of pixels composing an input image; a plurality of output buffers layered to two or more stages configured to receive an output of the distortion correction circuit, and perform output for each transmission block which is a set of pixels with the consecutive corrected pixel positions; and a controller configured to write an output pixel of the distortion correction circuit in the first-stage output buffer, sequentially transfer the written pixel to a post-stage output buffer, and cause output buffers at respective stages to store pixels of sub-blocks into which the transmission block is divided.Type: ApplicationFiled: September 5, 2018Publication date: September 19, 2019Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Ryuji HADA
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Patent number: 10321066Abstract: A light source estimating apparatus of embodiments has a sensitivity ratio spatial distribution calculating unit configured to extract a first color pixel and a second color pixel which have close spectral sensitivity and which have different sensor responses from a first picked up image picked up with an image sensor under an arbitrary light source, and calculate a ratio between a signal value of the first color pixel and a signal value of the second color pixel to acquire a first sensitivity ratio spatial distribution, and a similarity determining unit configured to estimate a type of the arbitrary light source based on similarity between a second sensitivity ratio spatial distribution group calculated using a second picked up image picked up with the image sensor under a known light source and the first sensitivity ratio spatial distribution.Type: GrantFiled: November 17, 2015Date of Patent: June 11, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Ryuji Hada, Ken Tanabe
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Publication number: 20180220117Abstract: The image processing device of an embodiment, to which multiple inputted pixels forming an inputted image are inputted in a raster scan order, includes a written pixel position calculating circuit configured to convert the position of each of the inputted pixels to a first pixel position in an outputted image, a read-out pixel position calculating circuit configured to convert the position of an outputted pixel near the first pixel position in the outputted image to a second pixel position in the inputted image, and a pixel interpolating circuit configured to calculate the pixel value of the second pixel position through interpolation with surrounding pixels in the inputted image.Type: ApplicationFiled: January 26, 2018Publication date: August 2, 2018Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Ryuji HADA, Atsushi MASUDA
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Publication number: 20170264868Abstract: An imaging apparatus of an embodiment includes a plurality of light receiving units arranged in an array to each detect light with a specific color and a specific polarization angle. In the plurality of light receiving units, both the color and polarization angle to be detected differ between the light receiving units adjacent to each other.Type: ApplicationFiled: May 30, 2017Publication date: September 14, 2017Inventors: Atsushi Masuda, Nobu Matsumoto, Ken Tanabe, Ryuji Hada
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Publication number: 20170070655Abstract: A light source estimating apparatus of embodiments has a sensitivity ratio spatial distribution calculating unit configured to extract a first color pixel and a second color pixel which have close spectral sensitivity and which have different sensor responses from a first picked up image picked up with an image sensor under an arbitrary light source, and calculate a ratio between a signal value of the first color pixel and a signal value of the second color pixel to acquire a first sensitivity ratio spatial distribution, and a similarity determining unit configured to estimate a type of the arbitrary light source based on similarity between a second sensitivity ratio spatial distribution group calculated using a second picked up image picked up with the image sensor under a known light source and the first sensitivity ratio spatial distribution.Type: ApplicationFiled: November 17, 2015Publication date: March 9, 2017Inventors: Ryuji Hada, Ken Tanabe
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Publication number: 20160269694Abstract: An imaging apparatus of an embodiment includes a plurality of light receiving units arranged in an array to each detect light with a specific color and a specific polarization angle. In the plurality of light receiving units, both the color and polarization angle to be detected differ between the light receiving units adjacent to each other.Type: ApplicationFiled: September 3, 2015Publication date: September 15, 2016Inventors: Atsushi Masuda, Nobu Matsumoto, Ken Tanabe, Ryuji Hada
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Publication number: 20160260197Abstract: According to embodiments, an image processing apparatus includes a line memory that holds one line of image signals, a line buffer that holds an image signal transferred from the line memory, and a signal processing section that generates an output image signal, the distortion of which is corrected, using the image signal stored in the line buffer, wherein the image signal and the output image signal are both RAW image signals, and the signal processing section subjects the image signal to demosaicking processing using a color component identical to the color component of an output pixel.Type: ApplicationFiled: June 9, 2015Publication date: September 8, 2016Inventors: Ryuji HADA, Yutaka OTA
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Patent number: 8888296Abstract: A projector is provided with: an input line memory which holds an input image signal corresponding to one line; an image processor which generates an intermediate image signal correction-processed according to distortion of a projection lens, using the input image signal transferred from the input line memory; an output line memory which holds the intermediate image signal corresponding to one line; and an LCOS which guides light radiated from a light source to the projection lens in accordance with the intermediate image signal. The image processor is provided with an input supplementation buffer which stores the input image signals of a plurality of lines, an input data buffer which stores input image signals required to generate the intermediate image signal corresponding to one line, and a number-of-supplementary-lines calculator which calculates the number of supplementary lines of the input image signals.Type: GrantFiled: March 15, 2012Date of Patent: November 18, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Yutaka Ota, Ryuji Hada