Patents by Inventor Sèbastien Kerdiles
Sèbastien Kerdiles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100093152Abstract: The invention relates to a method of forming a structure comprising a thin layer of semiconductor material transferred from a donor substrate onto a second substrate, wherein two different atomic species are co-implanted under certain conditions into the donor substrate so as to create a weakened zone delimiting the thin layer to be transferred. The two different atomic species are implanted so that their peaks have an offset of less than 200 ? in the donor substrate, and the substrates are bonded together after roughening at least one of the bonding surfaces.Type: ApplicationFiled: November 23, 2007Publication date: April 15, 2010Inventors: Sébastien Kerdiles, Willy Michel, Walter Schwarzenbach, Daniel Delprat, Nadia Ben Mohamed
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Publication number: 20100015780Abstract: A method for minimizing or avoiding contamination of a receiving handle wafer during transfer of a thin layer from a donor wafer. This method includes providing a donor wafer and a receiving handle wafer, each having a first surface prepared for bonding and a second surface, with the donor wafer providing a layer of material to be transferred to the receiving handle wafer. Next, at least one of the first surfaces is treated to provide increased bonding energy when the first surfaces are bonded together; the surfaces are then bonded together to form an intermediate multilayer structure; and a portion of the donor wafer is removed to transfer the thin layer to the receiving handle wafer and form the semiconductor structure. This method avoids or minimizes contamination of the second surface of the receiving handle wafer by treating only the first surface of the donor wafer prior to bonding by exposure to a plasma, and by conducting any thermal treatments after plasma activation at a temperature of 300° C.Type: ApplicationFiled: September 24, 2009Publication date: January 21, 2010Inventors: Sébastien KERDILES, Christophe MALEVILLE, Fabrice LETERTRE, Olivier RAYSSAC
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Patent number: 7645682Abstract: The invention relates to improvements in a method for molecularly bonding first and second substrates together by placing them in surface to surface contact. The improvement includes, prior to placing the substrates in contact, cleaning the surface of one or both of the substrates in a manner to provide a cleaned surface that is slightly roughened compared to a conventionally polished surface, and heating at least one or both of the substrates prior to placing the substrates in contact while retaining the heating at least until the substrates are in surface to surface contact.Type: GrantFiled: October 16, 2007Date of Patent: January 12, 2010Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Sebastien Kerdiles, Willy Michel, Walter Schwarzenbach, Daniel Delprat
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Publication number: 20090294072Abstract: The invention relates to equipment for carrying out a process for bonding by molecular adhesion of two substrates to one another during which the surfaces of the substrates are placed in close contact and bonding occurs by propagation of a bonding front between the substrates. The invention includes, prior to bonding, a step of modifying the surface state of one or both of the surfaces of the substrates so as to regulate the propagation speed of the bonding front. The surface can be modified by locally or uniformly heating or roughening the surface(s) of the substrate(s).Type: ApplicationFiled: June 23, 2009Publication date: December 3, 2009Inventors: Sebastien Kerdiles, Carine Duret, Alexandre Vaufredaz, Frédéric Metral
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Patent number: 7615464Abstract: A method for minimizing or avoiding contamination of a receiving handle wafer during transfer of a thin layer from a donor wafer. This method includes one step of providing a donor wafer and a receiving handle wafer, each having a first surface prepared for bonding and a second surface, with the donor layer including a zone of weakness that defines a thin layer of donor wafer material to be transferred to the receiving handle wafer. Next, at least one of the first surfaces is treated to provide increased bonding energy when the first surfaces are bonded together; the surfaces are then bonded together to form an intermediate multilayer structure; and the thin layer is transferred to the receiving handle wafer to form a final multilayer structure by detachment at the zone of weakness and removal of remaining material of the donor wafer.Type: GrantFiled: May 25, 2005Date of Patent: November 10, 2009Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Sébastien Kerdiles, Christophe Maleville, Fabrice Letertre, Olivier Rayssac
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Publication number: 20090261064Abstract: The invention relates to a process for bonding by molecular adhesion of two substrates to one another during which the surfaces of the substrates are placed in close contact and bonding occurs by propagation of a bonding front between the substrates. The invention includes, prior to bonding, a step of modifying the surface state of one or both of the surfaces of the substrates so as to regulate the propagation speed of the bonding front. The surface can be modified by locally or uniformly heating or roughening the surface(s) of the substrate(s).Type: ApplicationFiled: June 23, 2009Publication date: October 22, 2009Inventors: Sebastien Kerdiles, Carine Duret, Alexandre Vaufredaz, Frederic Metral
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Patent number: 7601271Abstract: The invention relates to a process for bonding by molecular adhesion of two substrates to one another during which the surfaces of the substrates are placed in close contact and bonding occurs by propagation of a bonding front between the substrates. The invention includes, prior to bonding, a step of modifying the surface state of one or both of the surfaces of the substrates so as to regulate the propagation speed of the bonding front. The surface can be modified by locally or uniformly heating or roughening the surface(s) of the substrate(s).Type: GrantFiled: February 17, 2006Date of Patent: October 13, 2009Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Sebastien Kerdiles, Carine Duret, Alexandre Vaufredaz, Frédéric Metral
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Publication number: 20090111243Abstract: A method of producing a semiconductor structure having a buried insulating layer having a thickness between 2 and 25 nm, by: forming at least one insulating layer on a surface of a first or second substrate, or both, wherein the surfaces are free from an insulator or presenting a native oxide layer resulting from exposure of the substrates to ambient conditions; assembling the first and second substrates; and thinning down the first substrate, in order to obtain the semiconductor structure. In this method, the insulating layer forming stage is a plasma activation based on an oxidizing or nitriding gas.Type: ApplicationFiled: September 24, 2008Publication date: April 30, 2009Inventors: Didier Landru, Sebastien Kerdiles
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Publication number: 20090023267Abstract: A method for reducing roughness of an exposed surface of an insulator layer on a substrate, by depositing an insulator layer on a substrate wherein the insulator layer includes an exposed rough surface opposite the substrate, and then smoothing the exposed rough surface of the insulator layer by exposure to a gas plasma in a chamber. The chamber contains therein a gas at a pressure of greater than 0.25 Pa but less than 30 Pa, and the gas plasma is created using a radiofrequency generator applying to the insulator layer a power density greater than 0.6 W/cm2 but less than 10 W/cm2 for at least 10 seconds to less than 200 seconds. Substrate bonding and layer transfer may be carried out subsequently to transfer the thin layer of substrate and the insulator layer to a second substrate.Type: ApplicationFiled: September 19, 2008Publication date: January 22, 2009Inventors: Nicolas Daval, Sebastien Kerdiles, Cecile Aulnette
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Patent number: 7449395Abstract: The invention concerns a method of fabricating a composite substrate comprising at least one thin insulating layer interposed between a support substrate and an active layer of semiconductor material. The method comprises: providing a source substrate that comprises a semiconductor material and a support substrate; forming or depositing an insulating layer on the source substrate; providing recovery heat treatment of the insulating layer; providing plasma activation of a front face of the recovery heat treated insulating layer or a front face of the support substrate; molecular bonding, after the plasma activation, the front face of the insulating layer with the front face of the support substrate to form a bonded substrate; and lifting off a back portion of the source substrate from the bonded substrate to retain an active layer that comprises a remaining portion of the source substrate.Type: GrantFiled: June 23, 2006Date of Patent: November 11, 2008Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Frédéric Allibert, Sébastien Kerdiles
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Patent number: 7446019Abstract: A method for reducing roughness of an exposed surface of an insulator layer on a substrate, by depositing an insulator layer on a substrate wherein the insulator layer includes an exposed rough surface opposite the substrate; treating the first substrate to form a zone of weakness beneath the insulator layer; and smoothing the exposed rough surface of the insulator layer by exposure to a gas plasma in a chamber. The chamber contains therein a gas at a pressure of greater than 0.25 Pa but less than 30 Pa, and the gas plasma is created using a radio frequency generator applying to the insulator layer a power density greater than 0.6 W/cm2 but less than 10 W/cm2 for at least 10 seconds to less than 200 seconds. Substrate bonding and layer transfer may be carried out subsequently to transfer the thin layer of substrate to the insulator layer and to a second substrate.Type: GrantFiled: July 5, 2006Date of Patent: November 4, 2008Assignee: S.O.I. Tec Silicon on Insulator TechnologiesInventors: Nicolas Daval, Sebastien Kerdiles, Cécile Aulnette
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Patent number: 7419884Abstract: The invention relates to a method of bonding together two wafers made of materials selected from semiconductor materials by providing two wafers each having a surface that is suitable for molecular bonding; and conducting plasma activation of at least one surface of one of the wafers by directing plasma species onto the surface(s) being activated while controlling activation parameters of the plasma to provide kinetic energy to the species sufficient to create a disturbed region of controlled thickness beneath the surface(s) being activated. Advantageously, the surface of each wafer is activated for optimum results while the controlling of the activation parameters also serves to control the maximum depth of the disturbed region in the surfaces.Type: GrantFiled: November 23, 2005Date of Patent: September 2, 2008Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventor: Sébastien Kerdiles
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Publication number: 20080200008Abstract: The invention relates to improvements in a method for molecularly bonding first and second substrates together by placing them in surface to surface contact. The improvement includes, prior to placing the substrates in contact, cleaning the surface of one or both of the substrates in a manner to provide a cleaned surface that is slightly roughened compared to a conventionally polished surface, and heating at least one or both of the substrates prior to placing the substrates in contact while retaining the heating at least until the substrates are in surface to surface contact.Type: ApplicationFiled: October 16, 2007Publication date: August 21, 2008Inventors: Sebastien Kerdiles, Willy Michel, Walter Schwarzenbach, Daniel Delprat
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Publication number: 20080014718Abstract: A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.Type: ApplicationFiled: May 29, 2007Publication date: January 17, 2008Applicant: S.O.I TEC Silicon on Insulator Technologies S.A.Inventors: Eric Neyret, Sebastien Kerdiles
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Publication number: 20080014713Abstract: A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.Type: ApplicationFiled: April 19, 2007Publication date: January 17, 2008Inventors: Eric Neyret, Sebastien Kerdiles
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Publication number: 20070173033Abstract: The invention concerns a method of fabricating a composite substrate comprising at least one thin insulating layer interposed between a support substrate and an active layer of semiconductor material. The method comprises: providing a source substrate that comprises a semiconductor material and a support substrate; forming or depositing an insulating layer on the source substrate; providing recovery heat treatment of the insulating layer; providing plasma activation of a front face of the recovery heat treated insulating layer or a front face of the support substrate; molecular bonding, after the plasma activation, the front face of the insulating layer with the front face of the support substrate to form a bonded substrate; and lifting off a back portion of the source substrate from the bonded substrate to retain an active layer that comprises a remaining portion of the source substrate.Type: ApplicationFiled: June 23, 2006Publication date: July 26, 2007Inventors: Frederic Allibert, Sebastien Kerdiles
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Publication number: 20070170503Abstract: The invention specifically relates to methods of fabricating a composite substrate by providing a first insulating layer on a support substrate at a thickness of e1 and providing a second insulating layer on a source substrate at a thickness of e2, with each layer having an exposed face for bonding; providing plasma activation energy in an amount sufficient to activate a portion of the thickness of the face of the first insulating layer emp1 and a portion of the thickness of the face of the second insulating layer emp1; providing a final insulating layer by molecular bonding the activated face of the first insulating layer with the activated face of the second insulating layer; and removing a back portion of the source substrate while retaining an active layer comprising a remaining portion of the source substrate bonded to the support substrate with the final insulating layer interposed therein to form the composite substrate.Type: ApplicationFiled: June 23, 2006Publication date: July 26, 2007Inventors: Frederic Allibert, Sebastien Kerdiles
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Patent number: 7235461Abstract: A method for bonding semiconductor structures together is described. The technique includes providing a bonding surface on each of two semiconductor structures, brushing a bonding surface of at least one of the structures to remove contaminants and to activate hydroxyl groups on the bonding surface to enhance hydrophilicity and to facilitate molecular bonding of the structures, and joining the bonding surfaces together by molecular bonding to form a composite structure.Type: GrantFiled: April 27, 2004Date of Patent: June 26, 2007Assignees: S.O.I.Tec Silicon on Insulator Technologies, Commissariat à l'Energie Atomique (CEA)Inventors: Christophe Maleville, Corinne Maunand Tussot, Olivier Rayssac, Sébastien Kerdiles, Benjamin Scarfogliere, Hubert Moriceau, Christophe Morales
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Patent number: 7232739Abstract: Methods are provided for producing a transfer layer of a semiconductor material on a final substrate. In some embodiments, the transfer layer is produced on the final substrate by forming a layer of semiconductor material on an initial support, assembling that layer and a final substrate by metal bonding, and mechanically separating the initial support from the layer at a weak interface that initially attached the layer to the initial support. An intermediate substrate can be obtained which can be used to fabricate a variety of components such as light-emitting diodes or laser diodes. These techniques can produce a transfer layer on a final substrate and a recyclable initial support that can be detached from the transfer layer for recycling by a non-destructive mechanical release.Type: GrantFiled: June 7, 2006Date of Patent: June 19, 2007Assignees: S.O.I. Tec Silicon on Insulator Technologies, Commissariat à l 'Energie Atomique (CEA)Inventors: Sèbastien Kerdiles, Fabrice Letertre, Christophe Morales, Hubert Moriceau
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Publication number: 20070119812Abstract: The invention relates to a process for bonding by molecular adhesion of two substrates to one another during which the surfaces of the substrates are placed in close contact and bonding occurs by propagation of a bonding front between the substrates. The invention includes, prior to bonding, a step of modifying the surface state of one or both of the surfaces of the substrates so as to regulate the propagation speed of the bonding front. The surface can be modified by locally or uniformly heating or roughening the surface(s) of the substrate(s).Type: ApplicationFiled: February 17, 2006Publication date: May 31, 2007Inventors: Sebastien Kerdiles, Carine Duret, Alexandre Vaufredaz, Frederic Metral