Abstract: A computer processor including a plurality of functional units that performs operations that produce result operands at different characteristic latencies over multiple cycles. An interconnect network provides data paths for transfer of operand data between functional units. The interconnect network includes first and second crossbar parts. The first crossbar part is configured to route result operands produced with the lowest characteristic latency to any other functional unit. The second crossbar part is configured to route result operands with higher characteristic latency relative to the lowest characteristic latency to the first crossbar part where such result operands are in turn routed to any functional unit. In another aspect, the functional units can be organized as multiple slots where each slot can produce multiple result operands of different characteristic latencies in the same cycle, and wherein each slot employs separate result registers for each characteristic latency present on the slot.

Abstract: A computer processor including a plurality of storage elements logically organized as a fixed length queue referenced by logical temporal addresses. The fixed length queue operates over multiple cycles to temporarily store operands referenced by at least one instruction utilizing the logical temporal addresses. A plurality of functional units performs operations over the multiple cycles, wherein the operations produce and access operands stored in the logical fixed length queue. Operands can be added to the front of the logical fixed length queue according to the temporal order that operands are produced by the functional units, and operands can drop from the end of the logical fixed length queue as operands are added to the front of the fixed length queue. A plurality of operands produced by the plurality of functional units (possibly with different latencies in producing such operands) can be added to the logical fixed length queue in a single cycle.

Abstract: A computer processor including a first memory structure that operates over multiple cycles to temporarily store operands referenced by at least one instruction. A plurality of functional units performs operations that produce and access operands stored in the first memory structure. A second memory structure is provided, separate from the first memory structure. The second memory structure is configured as a dedicated memory for storage of operands copied from the first memory structure. The second memory structure is organized with a byte-addressable memory space and each operand stored in the second memory structure is accessed by a given byte address into the byte-addressable memory space.

Abstract: The present invention relates to a process for production of hydrogen at low temperature starting from alcohols without formation of carbon using an oxyhydride material based on cerium and nickel and to the use of such a material as catalyst for transformation of alcohols to hydrogen.

Abstract: A computer processor employs an instruction processing pipeline that processes a sequence of wide instructions each having an encoding that represents a plurality of different operations. The plurality of different operations of the given wide instruction are logically organized into a number of phases having a predefined ordering such that at least one operation of the given wide instruction produces data that is consumed by at least one other operation of the given wide instruction. In certain circumstances where stalling is absent, the plurality of different operations of the phases of the given wide instruction can be issued for execution by the instruction processing pipeline over a plurality of consecutive machine cycles.

Abstract: A computer processor is provided that employs a plurality of operand storage elements that store operand data values and associated meta-data as unitary operand data elements as well as at least one functional unit that performs operations that produce and access the unitary operand data elements stored in the plurality of operand storage elements. The meta-data associated with a given operand data value as part of a unitary operand data element can specify type of the unitary operand data element (e.g., vector or scalar), elemental width and floating-point error flags. The meta-data can also be used to define special operand data values (e.g., Not-a-Result and None). The meta-data is useful in optimizing execution, such as in speculation and vectorized SIMD operations. The computer processor can also support a number of particular vector operations that are useful in optimizing execution of vectorized SIMD operations.

Abstract: A LED grid device comprising a LED grid and a plate-shaped member at which the LED grid has been arranged. The LED grid has several electrically conducting wires arranged side by side, and several LED modules, each LED module having a LED package, wherein each LED package is coupled to at least two wires of the electrically conducting wires. Each LED module further has a thermally conducting element positioned between two adjacent wires of the wires that the LED package is coupled to. The thermally conducting element carries the LED package, and protrudes from the LED package, and the thermally conducting element is attached to the plate-shaped member.

Abstract: There is provided a method for manufacturing a light emitting diode, LED, matrix (100) comprising the steps of providing with a maintained integrity a conductor sheet (150) with a plurality of component areas (111) interconnected with meandering connection tracks (116), mounting a plurality of LEDs (120) to a respective component area thereby forming a subassembly (100?), trimming and stretching the subassembly thereby straightening the connection tracks such that an m×n LED conductor matrix is formed during the step of stretching.

Abstract: The present invention relates to a grid-shaped lighting module (13; 23) comprising: a plurality of electrically conducting wires (15a-b) defining a grid with nodes (16a-c); and a plurality of solid-state light-sources (17a-c) each being arranged at a respective one of the nodes and connected to two electrically conducting wires of the plurality of electrically conducting wires. The electrically conducting wires (15a-b) are pleated such that the grid-shaped lighting module (13; 23) exhibits a 3D-topography. Various embodiments of the present invention provide improved mechanical stability and allows for thin illumination panels based on the grid-shaped lighting module.

Abstract: The invention relates to a method for preparing acrolein from glycerol or glycerin, according to which dehydration of glycerol or glycerin is carried out in the presence of a catalyst which consists in at least one silica modified with zirconium dioxide, titanium dioxide or tungsten trioxide or any combination of these oxides, and a heteropolyacid. This method may be used for making 3-(methylthio)propionic aldehyde (MMP), 2-hydroxy-4-methylthiobutyronitrile (HMBTN), methionine or its analogs, from acrolein.

Abstract: A continuous process for obtaining acrolein by catalytic dehydration of glycerol or glycerin, in the presence of an acid catalyst, wherein said process comprises the concomitant regeneration of said catalyst and is carried out in a fluidized bed reactor, said reactor comprising two zones, a first zone, or lower zone, termed catalyst regeneration zone, in which a fluidization gas comprising oxygen is introduced, and a second zone, or upper zone, termed reaction zone, in which the glycerol or glycerin is introduced and converted into acrolein.

Abstract: The invention relates to a method for preparing acrolein from glycerol or glycerin, according to which dehydration of glycerol or glycerin is carried out in the presence of a catalyst which consists in at least one silica modified with zirconium dioxide, titanium dioxide or tungsten trioxide or any combination of these oxides, and a heteropolyacid. This method may be used for making 3-(methylthio)propionic aldehyde (MMP), 2-hydroxy-4-methylthiobutyronitrile (HMBTN), methionine or its analogs, from acrolein.

Abstract: A process for the manufacture of fibre-reinforced intermediates useful in thermoplastic processing methods, including compounding and moulding, which comprises impregnating continuous fibres with a resin composition comprising at least one radiation-polymerizable component, exposing the impregnated fibres to radiation to effect polymerization of such component, and cutting the product to form thermoplastically processible intermediates which, optionally, may be mixed with other polymer and/or additives during mixing or moulding. A process described as above but in which the uncut radiation polymerized fibre-resin product is blended with a least one polymer and/or additive in a continuous mixer, such as an extruder; and the resulting blended product is cut to form thermoplastically processible intermediates, such as mouldable pellets.