Patents by Inventor S. Poon
S. Poon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9614183Abstract: A display may have thin-film transistor (TFT) circuitry on a substrate. An array of organic light-emitting diodes may be formed on the thin-film transistor circuitry. The display may include inorganic brittle layers and organic and metal layers that are ductile and mechanically robust. To help prevent propagation of cracks and other defects along the edge of the display, the display may be provided with crack stop structures and crack detection circuitry. The crack detection circuitry may include one or more loops that are formed along the periphery of the display. The crack stop structures may include TFT/OLED structures formed in a staggered configuration. At least some of the brittle layers can be removed from the panel edge. An additional adhesion layer may also be formed directly on the substrate to help prevent inorganic layers from debonding from the surface of the substrate.Type: GrantFiled: April 8, 2015Date of Patent: April 4, 2017Assignee: Apple Inc.Inventors: Zhen Zhang, Lalgudi Bhadrinarayana Visweswaran, Chih Jen Yang, Damien S. Boesch, Jae Won Choi, Paul S. Drzaic, Stephen S. Poon, Young Bae Park
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Patent number: 9535544Abstract: A touch screen to reduce touch pixel coupling. In some examples, the touch screen can include a first display pixel and a second display pixel in a row of display pixels, where the first display pixel can be configurable to be decoupled from the second display pixel during at least a touch sensing phase of the touch screen. In some examples, the touch screen can include a display pixel having a first and a second transistor, where the second transistor can be electrically connected to a gate terminal of the first transistor, and can be diode-connected. In some examples, the touch screen can include two display pixels, each display pixel having two transistors, where two of the transistors can be electrically connected to a first gate line, and the remaining two transistors can be individually electrically connected to a second and third gate line, respectively.Type: GrantFiled: May 31, 2013Date of Patent: January 3, 2017Assignee: Apple Inc.Inventors: Marduke Yousefpor, Taif Ahmed Syed, Ahmad Al-Dahle, Kevin J. White, Abbas Jamshidi-Roudbari, Stephen S. Poon
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Publication number: 20160306468Abstract: Displays such as organic light-emitting diode displays may be provided with touch sensing capabilities. A touch sensor may be formed from electrodes located on a thin-film encapsulation layer or one or more sides of a polarizer. A single-sided or double-sided touch sensor panel may be attached to the upper or lower surface of a polarizer. Control circuitry may be used to provide control signals to light-emitting diodes in the display using a grid of control lines. The control lines and transparent electrode structures such as indium tin oxide structures formed on a thin-film encapsulation layer or polarizer may be used as electrodes for a touch sensor. Displays may have active regions and inactive peripheral portions. The displays may have edge portions that are bent along a bend axis that is within the active region to form a borderless display. Virtual buttons may be formed on the bent edge portions.Type: ApplicationFiled: June 28, 2016Publication date: October 20, 2016Inventors: Wei Chen, Steven P. Hotelling, John Z. Zhong, Shih-Chang Chang, Stephen S. Poon
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Publication number: 20160293884Abstract: A display may have thin-film transistor (TFT) circuitry on a substrate. An array of organic light-emitting diodes may be formed on the thin-film transistor circuitry. The display may include inorganic brittle layers and organic and metal layers that are ductile and mechanically robust. To help prevent propagation of cracks and other defects along the edge of the display, the display may be provided with crack stop structures and crack detection circuitry. The crack detection circuitry may include one or more loops that are formed along the periphery of the display. The crack stop structures may include TFT/OLED structures formed in a staggered configuration. At least some of the brittle layers can be removed from the panel edge. An additional adhesion layer may also be formed directly on the substrate to help prevent inorganic layers from debonding from the surface of the substrate.Type: ApplicationFiled: April 8, 2015Publication date: October 6, 2016Inventors: Zhen Zhang, Lalguidi Bhadrinarayana Visweswaran, Chih Jen Yang, Damien S. Boesch, Jae Won Choi, Paul S. Drzaic, Stephen S. Poon, Young Bae Park
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Patent number: 9400576Abstract: Displays such as organic light-emitting diode displays may be provided with touch sensing capabilities. A touch sensor may be formed from electrodes located on a thin-film encapsulation layer or one or more sides of a polarizer. A single-sided or double-sided touch sensor panel may be attached to the upper or lower surface of a polarizer. Control circuitry may be used to provide control signals to light-emitting diodes in the display using a grid of control lines. The control lines and transparent electrode structures such as indium tin oxide structures formed on a thin-film encapsulation layer or polarizer may be used as electrodes for a touch sensor. Displays may have active regions and inactive peripheral portions. The displays may have edge portions that are bent along a bend axis that is within the active region to form a borderless display. Virtual buttons may be formed on the bent edge portions.Type: GrantFiled: July 19, 2011Date of Patent: July 26, 2016Assignee: Apple Inc.Inventors: Wei Chen, Steven P. Hotelling, John Z. Zhong, Shih-Chang Chang, Stephen S. Poon
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Patent number: 9329738Abstract: Embodiments described herein generally take the form of methods and systems for identifying and/or reducing a parasitic capacitance variation in a capacitive integrated touch-sensing module that may arise from proximity to a nearby electronic display.Type: GrantFiled: September 10, 2013Date of Patent: May 3, 2016Assignee: Apple Inc.Inventors: Marduke Yousefpor, Stephen S. Poon
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Publication number: 20150333293Abstract: An electronic device may include a display having an array of organic light-emitting diodes formed on a substrate. An encapsulation layer may be formed over the array of organic light-emitting diodes to protect the organic light-emitting diodes from moisture and other contaminants. The encapsulation layer may include a transparent sheet of material interposed between upper and lower inorganic films. The reliability of the encapsulation layer is increased by dividing one or both of the inorganic films into multiple sub-layers. The sub-layers may have different densities and may be deposited in sequential steps. Additional moisture protection may be provided by forming a conformal thin-film coating over the organic light-emitting diodes. The conformal thin-film coating may be an aluminum oxide layer that is formed using atomic layer deposition techniques.Type: ApplicationFiled: May 6, 2015Publication date: November 19, 2015Inventors: Stephen S. Poon, Chih Jen Yang, Damien S. Boesch, Bhadrinarayana L. Visweswaran
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Publication number: 20150275351Abstract: An evaporation tool is provided that has an elongated evaporation source with elongated edges that run parallel to a longitudinal axis and shorter edges that run perpendicular to the longitudinal axis. The evaporation source has multiple evaporation sources formed by respective source orifices through which material is evaporated. An evaporation control structure is mounted to the evaporation source to enhance the directionality of evaporated material. A shadow mask is provided that has a rectangular frame for supporting a metal mask layer with a pattern of openings. The evaporation control structure ensures that the evaporated material from the source is evaporated towards the shadow mask. Angled walls attached to the elongated edges, a series of vertical walls that extend between the angled walls in the evaporation control structure, and aligned vertical wall extensions on the frame of the shadow mask are used to block evaporated material following angled trajectories.Type: ApplicationFiled: September 30, 2014Publication date: October 1, 2015Inventors: Jungmin Lee, Jae Won Choi, Jueng-Gil J. Lee, Stephen S. Poon, John Z. Zhong
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Patent number: 9063605Abstract: A method of fabricating a display panel from a thin substrate using a carrier substrate is disclosed. The method includes depositing a bonding agent on a first surface of the thin substrate; depositing a bonding agent on a second surface of the carrier substrate; bonding the thin substrate and the carrier substrate with the bonding agent deposited on the first surface and the second surface; performing thin film processing on a third surface of the thin substrate opposite the first surface; and separating the processed thin substrate from the carrier substrate. The thin substrate has a thickness less than a required thickness for sustaining thin film processing while a thickness of the bonded thin substrate and the carrier substrates is greater than or equal to that the required thickness.Type: GrantFiled: September 15, 2011Date of Patent: June 23, 2015Assignee: Apple Inc.Inventors: Casey J. Feinstein, John Z. Zhong, Lynn R. Youngs, Stephen S. Poon
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Publication number: 20150124360Abstract: Described is a low power clamp or driver comprising: an inverter; and a silicon controlled rectifier (SCR) embedded in the inverter such that the SCR is part of the inverter. The clamp offers improved conductance per area and lower leakage current compared to the traditional PMOS-based active rail clamps. The clamp or driver combines a trigger circuit with the inverter-embedded SCR for maximum area efficiency. The clamp or driver also results in less stringent requirements for power ramp rates.Type: ApplicationFiled: November 1, 2013Publication date: May 7, 2015Inventors: Nathan D. Jack, Steven S. Poon
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Publication number: 20140354586Abstract: A touch screen to reduce touch pixel coupling. In some examples, the touch screen can include a first display pixel and a second display pixel in a row of display pixels, where the first display pixel can be configurable to be decoupled from the second display pixel during at least a touch sensing phase of the touch screen. In some examples, the touch screen can include a display pixel having a first and a second transistor, where the second transistor can be electrically connected to a gate terminal of the first transistor, and can be diode-connected. In some examples, the touch screen can include two display pixels, each display pixel having two transistors, where two of the transistors can be electrically connected to a first gate line, and the remaining two transistors can be individually electrically connected to a second and third gate line, respectively.Type: ApplicationFiled: May 31, 2013Publication date: December 4, 2014Inventors: Marduke YOUSEFPOR, Taif Ahmed SYED, Ahmad AL-DAHLE, Kevin J. WHITE, Abbas JAMSHIDI-ROUDBARI, Stephen S. POON
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Publication number: 20140071087Abstract: Embodiments described herein generally take the form of methods and systems for identifying and/or reducing a parasitic capacitance variation in a capacitive integrated touch-sensing module that may arise from proximity to a nearby electronic display.Type: ApplicationFiled: September 10, 2013Publication date: March 13, 2014Applicant: Apple Inc.Inventors: Marduke Yousefpor, Stephen S. Poon
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Publication number: 20140070225Abstract: A TFT stack for a liquid crystal display is provided. The TFT stack includes a silicon layer that includes a heavily doped region, a non-doped region, and a lightly doped region between the heavily doped region and the non-doped region. The heavily doped region is hydrogenated. The TFT stack also includes an insulation layer that includes a first portion formed over the lightly doped region and a second portion disposed over the non-doped region and a gate metal electrode layer formed over the second portion of the non-doped region. The TFT stack also includes a first dielectric layer disposed over the gate metal electrode and over the first portion of the insulation layer. The heavily doped region is hydrogenated to reduce the dependence of the capacitance between the gate metal electrode and the conductive layer Cgd upon a bias voltage being applied between the gate metal electrode and the conductive layer.Type: ApplicationFiled: September 6, 2013Publication date: March 13, 2014Applicant: Apple Inc.Inventors: Cheng-Ho Yu, Marduke Yousefpor, Yu-Cheng Chen, Stephen S. Poon, Ting-Kuo Chang, Young Bae Park
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Publication number: 20130021289Abstract: Displays such as organic light-emitting diode displays may be provided with touch sensing capabilities. A touch sensor may be formed from electrodes located on a thin-film encapsulation layer or one or more sides of a polarizer. A single-sided or double-sided touch sensor panel may be attached to the upper or lower surface of a polarizer. Control circuitry may be used to provide control signals to light-emitting diodes in the display using a grid of control lines. The control lines and transparent electrode structures such as indium tin oxide structures formed on a thin-film encapsulation layer or polarizer may be used as electrodes for a touch sensor. Displays may have active regions and inactive peripheral portions. The displays may have edge portions that are bent along a bend axis that is within the active region to form a borderless display. Virtual buttons may be formed on the bent edge portions.Type: ApplicationFiled: July 19, 2011Publication date: January 24, 2013Inventors: Wei Chen, Steven P. Hotelling, John Z. Zhong, Shih-Chang Chang, Stephen S. Poon
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Patent number: 8304807Abstract: A reduced capacitance diode. A first conductive layer provides conductive interconnects for pad and supply diffusion regions in a diode. A second conductive layer includes a first portion to couple the pad diffusion regions to a pad and a second portion to couple the supply diffusion regions to a voltage supply. Lines of the first and second conductive layers are substantially parallel to each other in a diode region of the diode. Further, for one aspect, a tap for the diode to be coupled to a supply is wider than a minimum width.Type: GrantFiled: November 5, 2010Date of Patent: November 6, 2012Assignee: Intel CorporationInventors: Timothy J. Maloney, Steven S. Poon
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Publication number: 20120009703Abstract: A method of fabricating a display panel from a thin substrate using a carrier substrate is disclosed. The method includes depositing a bonding agent on a first surface of the thin substrate; depositing a bonding agent on a second surface of the carrier substrate; bonding the thin substrate and the carrier substrate with the bonding agent deposited on the first surface and the second surface; performing thin film processing on a third surface of the thin substrate opposite the first surface; and separating the processed thin substrate from the carrier substrate. The thin substrate has a thickness less than a required thickness for sustaining thin film processing while a thickness of the bonded thin substrate and the carrier substrates is greater than or equal to that the required thickness.Type: ApplicationFiled: September 15, 2011Publication date: January 12, 2012Inventors: Casey J. FEINSTEIN, John Z. Zhong, Lynn R. Youngs, Stephen S. Poon
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Publication number: 20110050335Abstract: A reduced capacitance diode. A first conductive layer provides conductive interconnects for pad and supply diffusion regions in a diode. A second conductive layer includes a first portion to couple the pad diffusion regions to a pad and a second portion to couple the supply diffusion regions to a voltage supply. Lines of the first and second conductive layers are substantially parallel to each other in a diode region of the diode. Further, for one aspect, a tap for the diode to be coupled to a supply is wider than a minimum width.Type: ApplicationFiled: November 5, 2010Publication date: March 3, 2011Inventors: Timothy J. Maloney, Steven S. Poon
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Patent number: 7847317Abstract: A reduced capacitance diode. A first conductive layer provides conductive interconnects for pad and supply diffusion regions in a diode. A second conductive layer includes a first portion to couple the pad diffusion regions to a pad and a second portion to couple the supply diffusion regions to a voltage supply. Lines of the first and second conductive layers are substantially parallel to each other in a diode region of the diode. Further, for one aspect, a tap for the diode to be coupled to a supply is wider than a minimum width.Type: GrantFiled: December 31, 2002Date of Patent: December 7, 2010Assignee: Intel CorporationInventors: Timothy J. Maloney, Steven S. Poon
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Patent number: 7483247Abstract: A multi-stack power supply clamp circuit for providing electrostatic discharge (ESD) protection to enhance performance of advanced submicron processes is provided. The clamp circuit includes a bias voltage generator with low leakage and high current drive capabilities, and means to lighten current load on the voltage generator through reduced gate leakage. The bias voltage generator includes a differential amplifier. The multi-stack clamp circuit provides voltage-tolerant ESD protection with optimized leakage, reduced sensitivity to operating conditions, and tolerance of increased gate current in new process technologies.Type: GrantFiled: April 12, 2007Date of Patent: January 27, 2009Assignee: Intel CorporationInventors: Steven S. Poon, Timothy J. Maloney
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Patent number: D643427Type: GrantFiled: September 27, 2010Date of Patent: August 16, 2011Assignee: Toshiba America Information SystemsInventors: Thomas O. McGoldrick, Manuel B. Camarena, Jane S. Poon, Maciej M. Brzeski, Mario Kiang, Edward T. Johnson, Salvador O. Navarro