Abstract: Techniques regarding quantum computer error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that interpolates a gate parameter associated with a target stretch factor from a reference model that includes reference gate parameters for a quantum gate calibrated at a plurality of reference stretch factors.

Abstract: Systems and methods are provided for presenting media streams based on changes in geolocation. A MapView system may receive a first positioning signal indicating a first geographical location of a user device. The MapView system may determine a first media stream to be presented by the user device based on the first geographical location and a location of a source of the first media stream. The MapView system may then facilitate a presentation of the first media stream by the user device. When the MapView system receives a second positioning signal indicating a second geographical location of the user device, the MapView may identify, a second media stream to be presented by the user device based on the second geographical location being in broadcast range of the second media stream. The MapView system may then facilitate a presentation of the second media stream by the user device.

Abstract: Provided are azeotrope or azeotrope-like compositions comprised of 1-chloro-1,2 difluoroethylene (R-1122a) and 2,3,3,3-tetrafluoropropene (HFO-1234yf) and uses thereof.

Abstract: The present invention relates to heat transfer compositions comprising 1-chloro-1,2 difluoroethylene for use in refrigeration, air conditioning, heat pump systems, chillers, and other heat transfer applications.

Abstract: A piezoresistive force sensor which is designed in particular as a pressure sensor and can generate a sensor signal which is dependent on an amount of a force which acts on the force sensor in a force measuring direction. The force sensor has a first electrode, a second electrode and an elastically deformable resistance layer which electrically connects the two electrodes. A resistance value of a total resistance of an electrically conductive path between the first electrode to the second electrode via the resistance layer changes according to the amount of the acting force. By measuring a voltage between the electrodes or a current which flows along the electrically conductive path, for example, a sensor signal can be detected which describes the amount of the acting force. The resistance layer contains electrically conductive first staple fibers and electrically non-conductive second staple fibers.

Abstract: In order to minimize an increase in a bezel of a mobile terminal, provided is a mobile terminal comprising: a display panel; a window coupled to the front surface of the display panel so as to cover the front surface of the display panel; and a seating frame in which the display panel is mounted, wherein the seating frame comprises: a panel seating portion in which at least one region of the display panel is seated; a window seating portion which receives an edge region of the rear surface of the window and forms a large separation space from the rear surface of the window inward; and a sidewall portion forming a sidewall connecting the window seating portion and the panel seating portion, wherein the sidewall portion is recessed outward in a region corresponding to a side portion of the display panel.

Abstract: The invention relates to a sensor (15) which is produced by stitching it onto a carrier (16) using threads (17, 19, 33). The stitching forms a first electrode (18), a second electrode (20) and a covering layer (32). The covering layer (32) can be used to produce an electrically conductive connection between the first electrode (18) and the second electrode (20), at least if a force (F) acts on the covering layer (32) and presses at least one part of the covering layer (32) against a part of the first electrode (18) and of the second electrode (20). This force (F) can be caused by a pressure locally exerted on the covering layer (32) and/or by bending of the covering layer (32) or of the carrier (16). The entire sensor (15) and, in particular, the first electrode (18), the second electrode (20) and the covering layer (32) are produced solely by being stitched onto a common carrier (16). The sensor can be produced in a particularly simple and cost-effective manner and is robust.

Abstract: In order to minimize an increase in a bezel of a mobile terminal, provided is a mobile terminal comprising: a display panel; a window coupled to the front surface of the display panel so as to cover the front surface of the display panel; and a seating frame in which the display panel is mounted, wherein the seating frame comprises: a panel seating portion in which at least one region of the display panel is seated; a window seating portion which receives an edge region of the rear surface of the window and forms a large separation space from the rear surface of the window inward; and a sidewall portion forming a sidewall connecting the window seating portion and the panel seating portion, wherein the sidewall portion is recessed outward in a region corresponding to a side portion of the display panel.

Abstract: The present specification provides a heating element including an adhesive film; and a conductive heating pattern provided on at least one surface of the adhesive film and having a line height of 10 micrometers or less, and a method for fabricating the same.

Abstract: This application relates to a heating unit and a method for manufacturing the same. The heating unit according to an exemplary embodiment of this application includes a substrate, a transmittance adjusting layer which is provided on the substrate and includes one or more selected from a group consisting of Ni, Cr, Mo, Pt, and Ti; and a conductive heating pattern provided on the transmittance adjusting layer.

Abstract: The present specification relates to an aluminum oxide composition, a substrate including the same, and a method for manufacturing the same.

Abstract: The present specification provides a heating element including an adhesive film; and a conductive heating pattern provided on at least one surface of the adhesive film and having a line height of 10 micrometers or less, and a method for fabricating the same.

Abstract: An integrated electroosmotic pump may be incorporated in the same integrated circuit package with a re-combiner, and an integrated circuit chip to be cooled by fluid pumped by the electroosmotic pump.

Abstract: The present disclosure relates generally to microelectronic technology, and more specifically, to an apparatus used for the cooling of active electronic devices utilizing micro-channels or micro-trenches, and a technique for fabricating the same.

Abstract: A process flow to make an interconnect structure with one or more thick metal layers under Controlled Collapse Chip Connection (C4) bumps at a die or wafer level. The interconnect structure may be used in a backend interconnect of a microprocessor. The process flow may include forming an inter-layer dielectric with spray coating or lamination over a surface with high aspect ratio structures.

Abstract: Backside connections for 3D integrated circuits and methods to fabricate thereof are described. A stack of a first wafer over a second wafer that has a substrate of the first wafer on top of the stack, is formed. The substrate of the first wafer is thinned. A first dielectric layer is deposited on the thinned substrate. First vias extending through the substrate to the first wafer are formed in the first dielectric layer. A conductive layer is deposited in the first vias and on the first dielectric layer to form thick conductive lines. Second dielectric layer is formed on the conductive layer. Second vias extending to the conductive lines are formed in the second dielectric layer. Conductive bumps extending into the second vias and offsetting the first vias are formed on the second dielectric layer.

Abstract: A method of vertically stacking wafers is provided to form three-dimensional (3D) wafer stack. Such method comprising: selectively depositing a plurality of metallic lines on opposing surfaces of adjacent wafers; bonding the adjacent wafers, via the metallic lines, to establish electrical connections between active devices on vertically stacked wafers; and forming one or more vias to establish electrical connections between the active devices on the vertically stacked wafers and an external interconnect. Metal bonding areas on opposing surfaces of the adjacent wafers can be increased by using one or more dummy vias, tapered vias, or incorporating an existing copper (Cu) dual damascene process.

Abstract: Method and structure for vertically stacking microelectronic devices are disclosed. Subsequent to appropriate deposition, patterning, trenching, and passivation subprocesses, a conductive layer is formed wherein one end comprises an external contact portion for C4 interfacing, and another end establishes electrical contact with an internal contact at the bonding interface between the two interfaced devices. The conductive layer may be formed using electroplating, and may be formed in a single electroplating treatment, to form a continuous structure from via portion to external contact portion.

Abstract: A method of forming a silicon (Si) via in vertically stacked wafers is provided with a contact plug extending from selected metallic lines of a top wafer and an etch stop layer formed prior to the contact plug. Such a method comprises selectively etching through the silicon (Si) of the top wafer until stopped by the etch stop layer to form the Si via; depositing an oxide layer to insulate a sidewall of the Si via; forming a barrier layer on the oxide layer and on the bottom of the Si via; and depositing a conduction metal into the Si via to provide electrical connection between active IC devices located on vertically stacked wafers and an external interconnect.

Abstract: Method and structure for optimizing and controlling diffusional creep at metal contact interfaces are disclosed. Embodiments of the invention accommodate height variations in adjacent contacts, decrease planarization uniformity requirements, and facilitate contact bonding at lower temperatures and pressures by employing shapes and materials that respond predictably to compressive interfacing loads.