Patents by Inventor Sa Yoon Kang

Sa Yoon Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9570400
    Abstract: Provided is semiconductor package, including a semiconductor chip; an upper structure over the semiconductor chip, the upper structure having a first thermal expansion coefficient; and a lower structure under the semiconductor chip, the lower structure having a second thermal expansion coefficient of less than or equal to the first thermal expansion coefficient.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: February 14, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Bo-Na Baek, Seok-Won Lee, Eun-Seok Cho, Dong-Han Kim, Kyoung-Sei Choi, Sa-Yoon Kang
  • Publication number: 20150318226
    Abstract: Provided is semiconductor package, including a semiconductor chip; an upper structure over the semiconductor chip, the upper structure having a first thermal expansion coefficient; and a lower structure under the semiconductor chip, the lower structure having a second thermal expansion coefficient of less than or equal to the first thermal expansion coefficient.
    Type: Application
    Filed: December 17, 2014
    Publication date: November 5, 2015
    Inventors: Bo-Na BAEK, Seok-Won LEE, Eun-Seok CHO, Dong-Han KIM, Kyoung-Sei CHOI, Sa-Yoon KANG
  • Patent number: 8575746
    Abstract: A Chip on Flexible Printed Circuit (COF) type semiconductor package may include a flexible film, a semiconductor IC chip on the flexible film, and a heating pad on the flexible film.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: November 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Si-Hoon Lee, Sa-Yoon Kang, Kyoung-Sei Choi
  • Patent number: 8250750
    Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate tine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Sei Choi, Sa-Yoon Kang, Yong-Hwan Kwon, Chung-Sun Lee
  • Patent number: 8222089
    Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: July 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-sei Choi, Byung-seo Kim, Young-jae Joo, Ye-chung Chung, Kyong-soon Cho, Sang-heui Lee, Si-hoon Lee, Sa-yoon Kang, Dae-woo Son, Sang-gui Jo, Jeong-kyu Ha, Young-sang Cho
  • Patent number: 7999341
    Abstract: A rectangular display driver integrated circuit device adapted for use with a flat panel display (FPD) device is disclosed and comprises, a plurality of input pads arranged in a central portion of the display driver integrated circuit device, and a plurality of output pads arranged along edges of all four sides of the display driver integrated circuit device. An associated film, film package, and flat panel display (FPD) module adapted to receive the display driver integrated circuit device are also disclosed.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: August 16, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Publication number: 20110143625
    Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
    Type: Application
    Filed: February 23, 2011
    Publication date: June 16, 2011
    Inventors: Kyoung-sei Choi, Byung-seo Kim, Young-jae Joo, Ye-chung Chung, Kyong-soon Cho, Sang-heui Lee, Si-hoon Lee, Sa-yoon Kang, Dae-woo Son, Sang-gui Jo, Jeong-kyu Ha, Young-sang Cho
  • Publication number: 20110119912
    Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may he reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate tine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.
    Type: Application
    Filed: February 2, 2011
    Publication date: May 26, 2011
    Inventors: Kyoung-Sei Choi, Sa-Yoon Kang, Yong-Hwan Kwon, Chung-Sun Lee
  • Patent number: 7948768
    Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: May 24, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Ho Park, Sa-Yoon Kang, Si-Hoon Lee
  • Patent number: 7915727
    Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: March 29, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-sei Choi, Byung-seo Kim, Young-jae Joo, Ye-chung Chung, Kyong-soon Cho, Sang-heui Lee, Si-hoon Lee, Sa-yoon Kang, Dae-woo Son, Sang-gui Jo, Jeong-kyu Ha, Young-sang Cho
  • Patent number: 7902647
    Abstract: A device is provided in which a glass panel having beveled edge is flexibly connected to a TAB package. The outer lead portions of the TAB package include an end portion of first width connected to a connection pattern on the glass panel, a terminal portion having a second width greater than the first width, and a transition portion having a width that varies between the first and second widths. When the TAB package is connected the transition portion of the respective outer lead portions are disposed over the beveled edge of the glass panel.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Patent number: 7895742
    Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: March 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Sei Choi, Sa-Yoon Kang, Yong-Hwan Kwon, Chung-Sun Lee
  • Publication number: 20100149775
    Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.
    Type: Application
    Filed: September 8, 2009
    Publication date: June 17, 2010
    Inventors: Sang-Ho Park, Sa-Yoon Kang, Si-Hoon Lee
  • Publication number: 20100141617
    Abstract: A rectangular display driver integrated circuit device adapted for use with a flat panel display (FPD) device is disclosed and comprises, a plurality of input pads arranged in a central portion of the display driver integrated circuit device, and a plurality of output pads arranged along edges of all four sides of the display driver integrated circuit device. An associated film, film package, and flat panel display (FPD) module adapted to receive the display driver integrated circuit device are also disclosed.
    Type: Application
    Filed: February 17, 2010
    Publication date: June 10, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ye-chung CHUNG, Sa-yoon KANG
  • Patent number: 7732933
    Abstract: A semiconductor chip, having an active surface including a peripheral area and a central area, presents a connection area formed on a portion of the peripheral area. The semiconductor chip includes output pads formed in the peripheral area of the active surface and input pads formed in the central area of the active surface. The input pads may be connected to wiring patterns of a TAB tape passing over the connection area.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: June 8, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ye-Chung Chung, Dong-Han Kim, Sa-Yoon Kang
  • Publication number: 20100072607
    Abstract: A device is provided in which a glass panel having beveled edge is flexibly connected to a TAB package. The outer lead portions of the TAB package include an end portion of first width connected to a connection pattern on the glass panel, a terminal portion having a second width greater than the first width, and a transition portion having a width that varies between the first and second widths. When the TAB package is connected the transition portion of the respective outer lead portions are disposed over the beveled edge of the glass panel.
    Type: Application
    Filed: November 30, 2009
    Publication date: March 25, 2010
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Patent number: 7683471
    Abstract: A rectangular display driver integrated circuit device adapted for use with a flat panel display (FPD) device is disclosed and comprises, a plurality of input pads arranged in a central portion of the display driver integrated circuit device, and a plurality of output pads arranged along edges of all four sides of the display driver integrated circuit device. An associated film, film package, and flat panel display (FPD) module adapted to receive the display driver integrated circuit device are also disclosed.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Patent number: 7683476
    Abstract: Semiconductor package films and a display module comprising a packaged semiconductor device punched from a semiconductor package film are provided. In one embodiment, the invention provides a semiconductor package film comprising a base film comprising a plurality of semiconductor device regions, an intermediate region disposed on a first surface of the base film and disposed between two semiconductor device regions, and a reinforcing member attached to a second surface of the base film opposite the first surface of the base film and attached opposite the intermediate region. Each semiconductor device region comprises a semiconductor mounting region adapted to receive a semiconductor chip, and first and second metal line regions.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Si-hoon Lee, Jae-cheon Doh, Sa-yoon Kang
  • Patent number: 7649246
    Abstract: A device is provided in which a glass panel having beveled edge is flexibly connected to a TAB package. The outer lead portions of the TAB package include an end portion of first width connected to a connection pattern on the glass panel, a terminal portion having a second width greater than the first width, and a transition portion having a width that varies between the first and second widths. When the TAB package is connected the transition portion of the respective outer lead portions are disposed over the beveled edge of the glass panel.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ye-chung Chung, Sa-yoon Kang
  • Publication number: 20090273076
    Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
    Type: Application
    Filed: April 17, 2009
    Publication date: November 5, 2009
    Inventors: Kyong-sei CHOI, Byung-seo Kim, Young-jae Joo, Ye-chung Chung, Kyong-soon Cho, Sang-heui Lee, Si-hoon Lee, Sa-yoon Kang, Dae-woo Son, Sang-gui Jo, Jeong-kyu Ha, Young-sang Cho