Patents by Inventor Sachiyo Aoki

Sachiyo Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8085348
    Abstract: First and second division patterns are defined so that main areas A and A? are similar to each other in shape, having the same horizontal-to-vertical ratio. Even if an image output apparatus is connected to a display unit having both first and second display screens, the image output apparatus generates an identical image for the main area A or A? regardless of the aspect ratio of the display screen. The main areas A and A? display important information and the like. Sub areas B and B? display auxiliary information. The first and second division patterns may be determined so that the sub areas B and B? are similar to each other in shape like the main areas.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: December 27, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 8026919
    Abstract: A rendering processing unit of a graphics processor selects a buffer in a frame buffer in which to write rendering data by switching between multiple buffers in the frame buffer and writes rendering data accordingly; a display controller selects a buffer in the frame buffer from which to read rendering data by switching between a plurality of buffers in the frame buffer according to a sequence, and supplies the rendering data read by scanning the frame buffer to a display; a switching signal generating unit generates a buffer switching signal for directing the display controller to switch the buffer in the frame buffer from which to read at a frequency different from a vertical synchronization frequency of the display assumed by the graphics processor.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: September 27, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 7999814
    Abstract: An arithmetic processing unit in a graphics processor alternately executes a process of a first image processing which generates a main image of an application, i.e., a base image and a process of a second image processing which generates a display image eventually displayed by performing a desired processing of the base image. Processing time for the process of the first image processing is designated by a first process executing unit in a main processor which requests execution of the process of the first image processing. Processing time for the process of the second image processing is predetermined. The first process executing unit further determines an address of storage area in a frame buffer storing the base image and, upon determination, transmits to the second process executing unit which requests execution of the process of the second image processing.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: August 16, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 7864184
    Abstract: Provided is an image processing device for outputting a graphic image drawn into a frame memory after saving the image in a display memory. The image processing device is provided with a save processing section for saving frame data representing a predetermined image from a graphic memory in which the frame data is stored to a display memory, and an output interface for outputting the frame data saved in the display memory by transforming the frame data into a video output signal. The save processing section saves the frame data from the graphic memory to the display memory in equally divided units (partial data units). The partial data units of the frame data are outputted from the display memory.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: January 4, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 7714872
    Abstract: A method of quickly creating a texture which shows a continuous pattern when mapped repeatedly is provided. A space having three-dimensional objects arranged therein is rendered into a two-dimensional plane, or a rendering area. The rendering area is virtually divided into a plurality of congruent areas. Corresponding pixels of the areas are overlapped with each other to obtain a desired texture. At the time of overlapping, Z values in Z buffers are compared to update color information and Z values of a target area so that the data on pixels closer to a viewpoint shows all the time.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: May 11, 2010
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 7612781
    Abstract: A graphic memory is space-divided into a first area and a second area. In the first area, a task corresponding to a predetermined application is executed regardless of which task is processed by a main processor. A switchable area is divided in time so that data related to tasks corresponding to a plurality of applications is sequentially stored in the switchable area in accordance with task switching in the main processor.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: November 3, 2009
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Yoshinori Washizu, Motoi Kaneko, Sachiyo Aoki, Kaoru Yamanoue
  • Publication number: 20090225088
    Abstract: When drawing data of a graphics processor is displayed on a display having a different vertical synchronization frequency, a failure occurs. A drawing processing section (32) of a graphics processor (30) selects a frame buffer (44) composed of a multibuffer where drawing data is written by sequentially switching the frame buffer (44). A disc controller (50) sequentially switches frame buffers (44), selects a frame buffer (44) from which the drawing data is read, and supplies the read drawing data read by scanning the inside of the frame buffer to a display. A switch signal generating section (36) generates a buffer switch signal used to indicate the switching timing of the frame buffer (44) to be read to the display controller (50). The frequency of the buffer switch is different from the vertical synchronization frequency of the display (60).
    Type: Application
    Filed: November 30, 2006
    Publication date: September 10, 2009
    Applicant: SONY COMPUTER ENTERTAINMENT INC.
    Inventor: Sachiyo Aoki
  • Publication number: 20080211820
    Abstract: An arithmetic processing unit in a graphics processor alternately executes a process of a first image processing which generates a main image of an application, i.e., a base image and a process of a second image processing which generates a display image eventually displayed by performing a desired processing of the base image. Processing time for the process of the first image processing is designated by a first process executing unit in a main processor which requests execution of the process of the first image processing. Processing time for the process of the second image processing is predetermined. The first process executing unit further determines an address of storage area in a frame buffer storing the base image and, upon determination, transmits to the second process executing unit which requests execution of the process of the second image processing.
    Type: Application
    Filed: September 19, 2006
    Publication date: September 4, 2008
    Applicant: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Publication number: 20080192141
    Abstract: First and second division patterns are defined so that main areas A and A? are similar to each other in shape, having the same horizontal-to-vertical ratio. Even if an image output apparatus is connected to a display unit having both first and second display screens, the image output apparatus generates an identical image for the main area A or A? regardless of the aspect ratio of the display screen. The main areas A and A? display important information and the like. Sub areas B and B? display auxiliary information. The first and second division patterns may be determined so that the sub areas B and B? are similar to each other in shape like the main areas.
    Type: Application
    Filed: June 6, 2005
    Publication date: August 14, 2008
    Inventor: Sachiyo Aoki
  • Publication number: 20070296728
    Abstract: Provided is an image processing device for outputting a graphic image drawn into a frame memory after saving the image in a display memory. The image processing device is provided with a save processing section for saving frame data representing a predetermined image from a graphic memory in which the frame data is stored to a display memory, and an output interface for outputting the frame data saved in the display memory by transforming the frame data into a video output signal. The save processing section saves the frame data from the graphic memory to the display memory in equally divided units (partial data units). The partial data units of the frame data are outputted from the display memory.
    Type: Application
    Filed: July 1, 2005
    Publication date: December 27, 2007
    Applicant: SONY COMPUTER ENTERTAINMENT INC,
    Inventor: Sachiyo Aoki
  • Publication number: 20060085795
    Abstract: A graphic memory is space-divided into a first area and a second area. In the first area, a task corresponding to a predetermined application is executed regardless of which task is processed by a main processor. A switchable area is divided in time so that data related to tasks corresponding to a plurality of applications is sequentially stored in the switchable area in accordance with task switching in the main processor.
    Type: Application
    Filed: September 20, 2005
    Publication date: April 20, 2006
    Inventors: Yoshinori Washizu, Motoi Kaneko, Sachiyo Aoki, Kaoru Yamanoue
  • Publication number: 20060077208
    Abstract: A method of quickly creating a texture which shows a continuous pattern when mapped repeatedly is provided. A space having three-dimensional objects arranged therein is rendered into a two-dimensional plane, or a rendering area. The rendering area is virtually divided into a plurality of congruent areas. Corresponding pixels of the areas are overlapped with each other to obtain a desired texture. At the time of overlapping, Z values in Z buffers are compared to update color information and Z values of a target area so that the data on pixels closer to a viewpoint shows all the time.
    Type: Application
    Filed: August 3, 2005
    Publication date: April 13, 2006
    Inventor: Sachiyo Aoki
  • Publication number: 20050271361
    Abstract: A rendering process for rendering an image frame and a postprocess for adapting the image frame to a display are separated. A rendering processing unit 42 generates an image frame sequence by performing rendering at a predetermined frame rate regardless of a condition that the image frame should meet for output to the display. A postprocessing unit 50 subjects the image frame sequence generated by the rendering processing unit to a merge process so as to generate and output an updated image frame sequence that meets the condition. Since the rendering process and the postprocess are separated, the image frame sequence can be generated regardless of the specification of the display such as resolution and frame rate of the display.
    Type: Application
    Filed: May 19, 2005
    Publication date: December 8, 2005
    Inventors: Sachiyo Aoki, Akio Ohba, Masaaki Oka, Nobuo Sasaki
  • Patent number: 6892214
    Abstract: This invention provides a digital filter which permits input data to be little canceled. Based on an input signal, a coefficient is calculated through delay units 10, 11, coefficient multiplier units 20, 21, 22, adder units 30, 31, 32 and an offset constant unit 40, and the thus obtained coefficient is multiplied by the input signal through coefficient multiplier unit 23.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: May 10, 2005
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Sachiyo Aoki, Akio Ohba
  • Patent number: 6437798
    Abstract: An information processing apparatus and an information processing method adapted for representing objects of various shapes as two-dimensional graphic or three-dimensional graphic to change corresponding object so as to take various states within three-dimensional virtual space. Among prepared plural three-dimensional attitudes of object, attitude A0 is selected as reference attitude. Vectors serving as rotation axes when rotation is made from the reference attitude to attitudes A1, A2 are multiplied by their rotational angles as length, and are multiplied by weighting coefficients corresponding to an input signal inputted by allowing user to operate an input unit. Further, those vectors are synthesized to thereby synthesize (generate) vector serving as new axis of rotation. By rotating the object in the state where that vector is caused to be axis of rotation and its length is caused to be rotation angle, target attitude An is obtained.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: August 20, 2002
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Sachiyo Aoki
  • Patent number: 6428415
    Abstract: A portable game machine 60 includes a detachable transparent film 62, a base film 63, and reels 64a, 64b, and a reflective liquid crystal panel 8 which is sandwiched in between, with the transparent film 62 in front of, and the base film 63 in back of the reflective liquid crystal panel, which is supported in a housing 4 to display images. In the portable game machine 60, menu options, icons, and other auxiliary information is depicted on the transparent film and the base film, etc. By manipulation of an operation unit, instructions are given by moving an arrow, etc. displayed on the reflective liquid crystal panel 6. Auxiliary information corresponding to multiple scenes is depicted on the transparent film 62 and the base film 63, and the auxiliary information that is displayed in a display unit 61 is changed by rotating the reels 64a, 64b to scroll the transparent film 61 and the base film 63.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: August 6, 2002
    Assignee: Sony Computer Entertainment, Inc.
    Inventors: Akio Ohba, Masaaki Oka, Nobuo Sasaki, Sachiyo Aoki
  • Publication number: 20010039556
    Abstract: This invention provides a digital filter which permits input data to be little canceled. Based on an input signal, a coefficient is calculated through delay units 10, 11, coefficient multiplier units 20, 21, 22, adder units 30, 31, 32 and an offset constant unit 40, and the thus obtained coefficient is multiplied by the input signal through coefficient multiplier unit 23.
    Type: Application
    Filed: March 2, 2001
    Publication date: November 8, 2001
    Inventors: Sachiyo Aoki, Akio Ohba