Patents by Inventor Sadahiro Kishii

Sadahiro Kishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6159858
    Abstract: A slurry contains MnO.sub.2 or other manganese oxide as a primary component of abrasive particles. Further, a polishing process using such a manganese oxide abrasive and a fabrication process of a semiconductor device using such a polishing process are disclosed.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: December 12, 2000
    Assignees: Fujitsu Limited, Mitsui Mining & Smelting Co., Ltd.
    Inventors: Sadahiro Kishii, Ko Nakamura, Yoshihiro Arimoto, Akiyoshi Hatada, Rintaro Suzuki, Naruo Ueda, Kenzo Hanawa
  • Patent number: 6114247
    Abstract: A method of fabricating a semiconductor device includes a step of polishing a surface of a substrate by a chemical mechanical polishing process conducted on a polishing cloth by a slurry. The polishing is conducted so that projections having a height of about 30 .mu.m or less are formed on the polishing cloth with an interval of about 55 .mu.m or less as a result of the polishing.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: September 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Ko Nakamura, Sadahiro Kishii, Yoshihiro Arimoto
  • Patent number: 5877089
    Abstract: A slurry contains MnO.sub.2 or other manganese oxide as a primary component of abrasive particles. Further, a polishing process using such a manganese oxide abrasive and a fabrication process of a semiconductor device using such a polishing process are disclosed.
    Type: Grant
    Filed: January 27, 1998
    Date of Patent: March 2, 1999
    Assignee: Fujitsu Limited
    Inventors: Sadahiro Kishii, Akiyoshi Hatada, Rintaro Suzuki, Hiroshi Horie, Yoshihiro Arimoto, Ko Nakamura
  • Patent number: 5763325
    Abstract: A slurry contains MnO.sub.2 or other manganese oxide as a primary component of abrasive particles. Further, a polishing process using such a manganese oxide abrasive and a fabrication process of a semiconductor device using such a polishing process are disclosed.
    Type: Grant
    Filed: July 2, 1996
    Date of Patent: June 9, 1998
    Assignee: Fujitsu Limited
    Inventors: Sadahiro Kishii, Akiyoshi Hatada, Rintaro Suzuki, Hiroshi Horie, Yoshihiro Arimoto, Ko Nakamura
  • Patent number: 5624300
    Abstract: For providing a method for polishing in which it is possible to polish a substance uniformly over a whole surface of a wafer without observing the polished surface of the wafer halfway through polishing, a wafer with current detective patterns formed of conductors directly contacted with a semiconductor substrate, and an insulating film covering the current detective patterns is held by a wafer holder with conductivity, and the insulating film is polished by a polisher in which a supporting plate with conductivity is exposed in openings through a polishing cloth while supplying a polishing slurry containing ions.
    Type: Grant
    Filed: July 10, 1996
    Date of Patent: April 29, 1997
    Assignee: Fujitsu Limited
    Inventors: Sadahiro Kishii, Yoshihiro Arimoto
  • Patent number: 5562529
    Abstract: An apparatus and method for polishing a semiconductor wafer. A polisher includes a supporting plate having a conductive film and a polishing cloth formed on the conductive film of the supporting plate. The polishing cloth has a plurality of openings to expose the conductive film. A wafer holder has a conductive wafer holding surface to hold a semiconductor wafer having current detective patterns and an insulating film covering the current detective patterns. A polishing slurry supply device supplies a polishing slurry including ions to either the polishing cloth or the semiconductor wafer. A current detecting device, connected to the supporting plate and the wafer holder, detects a magnitude of a current flowing across the supporting plate and the wafer holder through the conductive wafer holding surface, the semiconductor wafer held by the wafer holder, the current detective patterns of the semiconductor wafer, the polishing slurry filled in the openings of the polishing cloth, and the conductive film.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: October 8, 1996
    Assignee: Fujitsu Limited
    Inventors: Sadahiro Kishii, Yoshihiro Arimoto, Hiroshi Horie, Fumitoshi Sugimoto
  • Patent number: 5227339
    Abstract: Disclosed is a method of manufacturing a semiconductor wafer or SOI substrate having a total thickness variation (TTV) of 1 micrometer or less which is required to make a future semiconductor integrated circuit of high density. A semiconductor crystal disk made by slicing a semiconductor crystal ingot is flattened by being subjected to a flattening step such as a grinding, chemical-mechanical polishing or the like and then subjected to a step for providing an asymmetric configuration such as an orientation flat (OF) and the like. With this process, the deterioration of flatness due to the presence of the OF and the like can be prevented. Further, a flattening step conventionally carried out by lapping is replaced by surface grinding, by which the flatness of a wafer is improved and an etching step following the lapping can be omitted. The introduction of this process enables semiconductor wafers having a TTV of 1 micrometer or less and a diameter of 6 inches to be obtained at a yield of 90% or more.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: July 13, 1993
    Assignee: Fujitsu Limited
    Inventor: Sadahiro Kishii