Patents by Inventor Sadashi Shimoda

Sadashi Shimoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5998974
    Abstract: A charge/discharge control circuit has a voltage detector for detecting a voltage level of a secondary cell, a switch connected in series with the secondary cell, and a control circuit connected in parallel with the voltage detector for receiving and processing an output signal of the voltage detector and controlling an impedance of the switch. The voltage detector, the switch and the control circuit are integrated in a single substrate. In a preferred embodiment, the switch comprises an external connection terminal and a second terminal connected to the secondary cell, a first IGFET connected between the first and second terminals, a second IGFET connectected between the first terminal and a substrate electrode of the first IGFET, and a third IGFET connected between the second terminal and the substrate electrode of the first IGFET.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: December 7, 1999
    Assignee: Seiko Instruments Inc.
    Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
  • Patent number: 5982150
    Abstract: A charge/discharge control circuit is provided for an electric power source apparatus in which a service life is prolonged. A voltage dividing circuit, an overcharge voltage detection circuit, an overdischarge voltage detection circuit and a control circuit are connected in parallel to a secondary cell which is an electric power source, wherein the control circuit detects a condition of the secondary cell from the overcharge/overdischarge voltage detection circuits and outputs a signal Vs for controlling a power supply to an external equipment and a charge by an external power source and controls a switching element provided in series with the voltage dividing circuit and reduces a current which flows through the voltage dividing circuit.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: November 9, 1999
    Assignee: Seiko Instruments Inc.
    Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
  • Patent number: 5841265
    Abstract: A charge/discharge control circuit comprises two serially connected electric power sources and two overcharge/overdischarge detection circuits. A control circuit outputs a signal for controlling the charge/discharge of the electric power sources in accordance with signals from the two overcharge/overdischarge detection circuits. An intermediate voltage receiving circuit receives, in accordance with the signal from the control circuit, a voltage at a junction point between the two electric power sources and outputs a signal indicative of a relation of the relative voltage between the two electric power sources.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: November 24, 1998
    Assignee: Seiko Instruments Inc.
    Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
  • Patent number: 5742148
    Abstract: A chargeable power supply which has a charge/discharge control circuit is provided in which the service life of a secondary cell is prolonged. A voltage dividing circuit, an overcharge voltage detection circuit, an overdischarge detection circuit and a control circuit are connected in parallel to the secondary cell. The control circuit receives signals indicating the condition of the secondary cell from the overcharge/overdischarge voltage detection circuits and outputs a signal for controlling a switch circuit for disconnecting the secondary cell from external equipment, or to stop a charging operation by an external power source. The control circuit also controls a switching element provided in series with the voltage dividing circuit and reduces a current which flows through the dividing circuit. A current limiting means is provided to limit the current consumption of the charge/discharge control circuit.
    Type: Grant
    Filed: November 17, 1993
    Date of Patent: April 21, 1998
    Assignee: Seiko Instruments Inc.
    Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
  • Patent number: 5570061
    Abstract: In a switching circuit, a first input terminal and a second input terminal are connected to an output terminal by switching transistors which are selectively activated to supply the desired input signal to the output terminal. In order to output selectively, a voltage detector detects a level of a first input voltage at the first input terminal so that either the first switching transistor or the second switching transistor turns on. The voltage at the output terminal is controlled by a voltage controlling circuit in accordance with the stability of the output signal. The voltage controlling circuit does this by controlling the conducting state of the first switching transistor so that a stable output voltage can be obtained. Since the voltage controlling circuit drives the gate of the first switching transistor, it may be a small device operable with low consuming current, thereby the chip size can be reduced.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: October 29, 1996
    Assignee: Seiko Instruments Inc.
    Inventor: Sadashi Shimoda
  • Patent number: 5216351
    Abstract: The voltage regulator of the boosting/lowering type is comprised of a switching regulator block and a series regulator block, which are cascade-connected to each other. One input terminal of an error amplifier of the switching regulator block is connected to a dividing node of bleeder resistors in the series regulator block to constitute a regulative feedback loop effective to improve an efficiency of the voltage regulator.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: June 1, 1993
    Assignee: Seiko Instruments Inc.
    Inventor: Sadashi Shimoda
  • Patent number: 5157291
    Abstract: A switching circuit has input terminals, switching MOS transistors, and a control circuit having a control terminal. Diodes are connected between the respective input terminals and the control circuit. When input voltage (V1, V2) are applied to the input terminals, the output terminal is selectively put in either a fixed or a floating state according to the voltage applied to the control terminal.
    Type: Grant
    Filed: February 4, 1991
    Date of Patent: October 20, 1992
    Assignee: Seiko Instruments Inc.
    Inventor: Sadashi Shimoda
  • Patent number: 4793693
    Abstract: A ferro-electric crystal electro-optical device which uses switching between bi-stable states of ferro-electric liquid crystal molecules. A change from one of the stable states to the other is effected by applying a selected voltage having a combination of chopping pulse to which the liquid crystal molecules are not responsive and DC pulse to which the liquid crystal molecules are responsive.
    Type: Grant
    Filed: March 2, 1987
    Date of Patent: December 27, 1988
    Assignee: Seiko Instruments, Inc.
    Inventors: Sadashi Shimoda, Takamasa Harada, Masaaki Taguchi, Kokichi Ito
  • Patent number: 4792211
    Abstract: A ferroelectric liquid crystal electro-optical device utilizes a liquid crystal layer composed of ferroelectric liquid crystal molecules. A first alignment layer is disposed in contact with the liquid crystal layer and has a uniaxial alignment characteristic effective to align the molecular axes of liquid crystal molecules immediately adjacent to the first alignment layer in a predetermined direction parallel to the liquid crystal layer. A second adjacent layer is opposed to the first alignment layer in contact with the liquid crystal layer. The second alignment layer has a random homogeneous alignment characteristic and a water repellency characteristic defined in terms of a water contact angle of more than 70.degree. jointly effective to align the molecular axes of liquid crystal molecules immediately adjacent to the second alignment layer in either of two orientation directions oppositely inclined relative to the predetermined direction in parallel to the liquid crystal layer.
    Type: Grant
    Filed: September 17, 1986
    Date of Patent: December 20, 1988
    Assignee: Seiko Instruments & Electronics Ltd.
    Inventors: Takamasa Harada, Masaaki Taguchi, Sadashi Shimoda, Koukichi Ito
  • Patent number: 4762400
    Abstract: A ferroelectric liquid crystal electro-optical device driven in time-sharing comprising; a ferroelectric liquid crystal layer having bi-stable alignment characteristics, means for converting the bi-stable alignment state to optical ON state or optical OFF state, a matrix electrode and means for driving the liquid crystal layer by applying voltages to the liquid crystal layer through the matrix electrode. A voltage sufficient to change a stable alignment state of the ferro-electric liquid crystal molecular is applied to a selected pixel, a voltage insufficient to change a stable alignment state is applied to a non-selected pixel and an AC voltage for holding a stable alignment state is applied to a half-selected pixel. A bias value, which is the ratio of the amplitude of the voltage applied to the selected pixel to the amplitude of the AC voltage applied to the half-selected pixel, is set near the maximum value of B satisfying the following formulaB/(B-2).gtoreq.
    Type: Grant
    Filed: May 27, 1987
    Date of Patent: August 9, 1988
    Assignee: Seiko Instruments Inc.
    Inventors: Sadashi Shimoda, Takamasa Harada, Masaaki Taguchi, Kokichi Ito
  • Patent number: RE36179
    Abstract: A switching circuit has input terminals, switching MOS transistors, and a control circuit having a control terminal. Diodes are connected between the respective input terminals and the control circuit. When input voltage (V1, V2) are applied to the input terminals, the output terminal is selectively put in either a fixed or a floating state according to the voltage applied to the control terminal.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: April 6, 1999
    Assignee: Seiko Instruments Inc.
    Inventor: Sadashi Shimoda