Abstract: A p-type well is formed in a semiconductor substrate, and an n+-type semiconductor region and a p+-type semiconductor region are formed in the p-type well to be spaced apart from each other. The n+-type semiconductor region is an emitter semiconductor region of a bipolar transistor, and the p-type well and the p+-type semiconductor region are base semiconductor regions of the bipolar transistor. An electrode is formed on an element isolation region between the n+-type semiconductor region and the p+-type semiconductor region, and at least apart of the electrode is buried in a trench which is formed in the element isolation region. The electrode is electrically connected to the n+-type semiconductor region.

Abstract: A p-type well is formed in a semiconductor substrate, and an n+-type semiconductor region and a p+-type semiconductor region are formed in the p-type well to be spaced apart from each other. The n+-type semiconductor region is an emitter semiconductor region of a bipolar transistor, and the p-type well and the p+-type semiconductor region are base semiconductor regions of the bipolar transistor. An electrode is formed on an element isolation region between the n+-type semiconductor region and the p+-type semiconductor region, and at least apart of the electrode is buried in a trench which is formed in the element isolation region. The electrode is electrically connected to the n+-type semiconductor region.

Abstract: A p-type well is formed in a semiconductor substrate, and an n+-type semiconductor region and a p+-type semiconductor region are formed in the p-type well to be spaced apart from each other. The n+-type semiconductor region is an emitter semiconductor region of a bipolar transistor, and the p-type well and the p+-type semiconductor region are base semiconductor regions of the bipolar transistor. An electrode is formed on an element isolation region between the n+-type semiconductor region and the p+-type semiconductor region, and at least a part of the electrode is buried in a trench which is formed in the element isolation region. The electrode is electrically connected to the n+-type semiconductor region.

Abstract: A p-type well is formed in a semiconductor substrate, and an n+-type semiconductor region and a p+-type semiconductor region are formed in the p-type well to be spaced apart from each other. The n+-type semiconductor region is an emitter semiconductor region of a bipolar transistor, and the p-type well and the p+-type semiconductor region are base semiconductor regions of the bipolar transistor. An electrode is formed on an element isolation region between the n+-type semiconductor region and the p+-type semiconductor region, and at least a part of the electrode is buried in a trench which is formed in the element isolation region. The electrode is electrically connected to the n+-type semiconductor region.

Abstract: An intermediate film 222 in a three-layered resist film 225 is formed by the chemical vapor deposition process at a temperature not higher than 300° C., using Si(OR1)(OR2)(OR3)(OR4), where each of R1, R2, R3 and R4 independently represents a carbon-containing group or a hydrogen atom, excluding the case where all of R1 to R4 are hydrogen atoms.

Abstract: In a method of manufacturing a semiconductor device where at least one insulating layer structure having a metal wiring constitution is formed to thereby construct a multi-layered wiring arrangement, a first SiOCH layer is produced. Then, a surface section of the first SiOCH layer is treated to change the surface section of the first SiOCH layer to a second SiOCH layer which features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer and an oxygen (O) density higher than that of the first SiOCH layer. Finally, a silicon dioxide (SiO2) layer is formed on the second SiOCH layer.

Abstract: A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal wiring conductor. A metal plug is formed by filling the opening with Cu containing metal via a barrier metal. The interlayer insulating film includes the insulating film which includes a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond in the carbon containing silicon oxide film. The proportion of Si—CH2 bond (1360 cm-1) to Si—CH3 bond (1270 cm-1) in the insulating film is in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum.

Abstract: A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then embedding a wiring material in the via hole through a barrier metal. According to this method, a plasma treatment is performed after the via hole is formed and before the barrier metal is deposited, using a He/H2 gas capable of replacing groups (methyl groups) made of organic constituents and covering the surface of the exposed organic low dielectric film (MSQ) with hydrogen, or a He gas capable decomposing the groups (methyl groups) without removing organic low dielectric molecules. As a result, the surface of the low dielectric film (MSQ) is reformed to be hydrophilic and adhesion to the barrier metal is hence improved, thereby making it possible to prevent the occurrence of separation of the barrier metal and scratches.

Abstract: A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal wiring conductor. A metal plug is formed by filling the opening with Cu containing metal via a barrier metal. The interlayer insulating film includes the insulating film which includes a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond in the carbon containing silicon oxide film. The proportion of Si—CH2 bond (1360 cm-1) to Si—CH3 bond (1270 cm-1) in the insulating film is in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum.

Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.

Abstract: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.

Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.

Abstract: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.

Abstract: An intermediate film 222 in a three-layered resist film 225 is formed by the chemical vapor deposition process at a temperature not higher than 300° C., using Si(OR1)(OR2)(OR3)(OR4) , where each of R1, R2, R3 and R4 independently represents a carbon-containing group or a hydrogen atom, excluding the case where all of R1 to R4 are hydrogen atoms.

Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.

Abstract: A method of fabricating a semiconductor device using a PECVD method is provided, which improves the adhesion strength of a deposited dielectric layer to an underlying layer and the reliability of the deposited dielectric layer. After placing a substrate in a chamber, a gas having a thermal conductivity of 0.1 W/mK or greater (e.g., H2 or He) is introduced into the chamber, thereby contacting the gas with the substrate for stabilization of a temperature of the substrate. A desired dielectric layer is deposited on or over the substrate in the chamber using a PECVD method after the step of introducing the gas. As the desired dielectric layer, a dielectric layer having a low dielectric constant, such as a SiCH, SiCHN, or SiOCH layer, is preferably used.

Abstract: A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then embedding a wiring material in the via hole through a barrier metal. According to this method, a plasma treatment is performed after the via hole is formed and before the barrier metal is deposited, using a He/H2 gas capable of replacing groups (methyl groups) made of organic constituents and covering the surface of the exposed organic low dielectric film (MSQ) with hydrogen, or a He gas capable decomposing the groups (methyl groups) without removing organic low dielectric molecules. As a result, the surface of the low dielectric film (MSQ) is reformed to be hydrophilic and adhesion to the barrier metal is hence improved, thereby making it possible to prevent the occurrence of separation of the barrier metal and scratches.

Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.

Abstract: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.

Abstract: A method of fabricating a semiconductor device using a PECVD method is provided, which improves the adhesion strength of a deposited dielectric layer to an underlying layer and the reliability of the deposited dielectric layer. After placing a substrate in a chamber, a gas having a thermal conductivity of 0.1 W/mK or greater (e.g.. H2 or He) is introduced into the chamber, thereby contacting the gas with the substrate for stabilization of a temperature of the substrate. A desired dielectric layer is deposited on or over the substrate in the chamber using a PECVD method after the step of introducing the gas. As the desired dielectric layer, a dielectric layer having a low dielectric constant, such as a SiCH, SiCHN, or SiOCH layer, is preferably used.