Patents by Inventor Sahil Sharma

Sahil Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230368857
    Abstract: Embodiments described herein provide a linked XOR flash data protection scheme for data storage devices. In particular, the embodiments described herein provide a data storage controller with a memory space efficient XOR-based flash data protection/recovery algorithm with minimal flash block space overhead and support of recovery from full plane failure with neighbor planes disturb (NPD) in a single word line. Additionally, the embodiments described herein provide a reduced flash block space dedicated for XOR parity buffers storage by a factor of a number of planes per die without losing the capability to recover from NPD.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventors: Oleg Kragel, Vijay Sivasankaran, Man Lung Mui, Sahil Sharma
  • Publication number: 20230337068
    Abstract: Because of the line-of-sight character of optical wireless communication and a limited field-of-view of optical receivers, the coverage of an access point (120) and the overlapping coverage area of adjacent access points (120) in an optical system are smaller as compared to a RF system. It turns more challenging to support an end point (110) to roam securely in an optical multi-cell wireless communication network (100). To address that problem, a subsystem is disclosed to select for the end point (110) a candidate access point out of the plurality of access points (120) in view of one or more neighbor relationships, and to inform the end point (110) about the candidate access point to trigger the end point (110) to start a procedure for pre-establishing a new pairwise transient key between the end point (110) and the candidate access point (120) for a secure handover.
    Type: Application
    Filed: February 15, 2021
    Publication date: October 19, 2023
    Inventors: Andries VAN WAGENINGEN, Piotr POLAK, Sahil SHARMA
  • Patent number: 11789612
    Abstract: For a non-volatile memory system with a multi-plane memory die having a large block size, to be able to more readily accommodate zone-based host data using zones that are of a smaller size that the block size on the memory, the memory system assigns data from different zones to different subsets of the planes of a common memory die. The memory system is configured to accumulate the data from the different zones into different write queues and then assemble the data from the different write zones into pages or partial pages of data that can be simultaneously programmed into memory cells connected to different word lines that are in different sub-blocks of different blocks in the corresponding assigned planes of the die.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: October 17, 2023
    Assignee: SanDisk Technologies LLC
    Inventors: Karin Inbar, Sahil Sharma, Grishma Shah
  • Publication number: 20230305722
    Abstract: A data storage device includes a non-volatile memory device having one or more memory dies and each of the memory dies include a plurality of input-output (I/O) lines. The data storage device further includes a controller. The controller is configured to receive an instruction to enter a low-power operating mode. Entering the low-power operating mode includes removing power from the one or more memory dies, providing an output signal toggling between a logic high and a logic low at a predetermined frequency to the plurality of I/O lines for a predetermined period of time, and operating in the low-power operating mode upon the expiration of the predetermined period of time.
    Type: Application
    Filed: March 22, 2022
    Publication date: September 28, 2023
    Inventors: Niles Yang, Sahil Sharma, Phil D. Reusswig
  • Patent number: 11755211
    Abstract: A data storage device including, in one implementation, a NAND memory and a controller. The NAND memory includes a read/write circuit configured to determine and store initial physical column addresses for each plane included in the NAND memory. The controller is configured to send a read-transfer command and a one-byte address to the NAND memory. The read/write circuit is also configured to retrieve a first initial physical column address from the initial physical column addresses stored in the NAND memory after the NAND memory receives the one-byte address from the controller. The first initial physical column address is associated with a die address and a plane address included in the one-byte address. The read/write circuit is further configured to retrieve a first set of data stored at the first initial physical column address. The read/write circuit is also configured to output the first set of data to the controller.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: September 12, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Grishma Shah, Daniel Tuers, Sahil Sharma, Hua-Ling Cynthia Hsu, Yenlung Li, Min Peng
  • Publication number: 20230281620
    Abstract: Blockchain-backed redistributable electronic content components is created and distributed. These techniques provider greater computer security and authentication controls, in various embodiments. An electronic content component associated with a first entity and a first set of actions is created. The electronic content component is published, and the first set of actions and a block representing the electronic content component are added to a blockchain. A second entity requests use of the electronic content component and a distribution agreement between the first and second entities associated with a second set of actions is created. The second set of actions and a block representing the distribution agreement are added to a blockchain. The electronic content component and distribution agreement are validated based on the blockchain, and custom content including the electronic content component is published.
    Type: Application
    Filed: April 5, 2023
    Publication date: September 7, 2023
    Inventors: Sahil Sharma, Ben William Gordon Hurst, Ping An, Purna Aditya Kumar Bhimaraju, Varun Kumar
  • Patent number: 11651366
    Abstract: Methods and systems are presented for creating and distributing blockchain-backed redistributable electronic content components. These techniques provider greater computer security and authentication controls, in various embodiments. An electronic content component associated with a first entity and a first set of actions is created. The electronic content component is published, and the first set of actions and a block representing the electronic content component are added to a blockchain. A second entity requests use of the electronic content component and a distribution agreement between the first and second entities associated with a second set of actions is created. The second set of actions and a block representing the distribution agreement are added to a blockchain. The electronic content component and distribution agreement are validated based on the blockchain, and custom content including the electronic content component is published.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: May 16, 2023
    Assignee: PAYPAL, INC.
    Inventors: Sahil Sharma, Ben William Gordon Hurst, Ping An, Purna Aditya Kumar Bhimaraju, Varun Kumar
  • Publication number: 20230111629
    Abstract: Because of the line-of-sight character of optical wireless communication and a limited field-of-view of optical receivers, the coverage of an access point and the overlapping coverage area of adjacent access points in an optical system are smaller as compared to a RF system. It turns more challenging to support an end point (110) to roam securely in an optical multi-cell wireless communication network. To speed up the derivation of a new pairwise transient key with a new access point during a handover procedure, the end point of this invention comprises a controller (118) that is configured to act as a second supplicant (1181), on behalf of a first supplicant (1186) comprised in a host processor (1185), to communicate with an authenticator to establish a new pairwise transient key for the end point (110) and a candidate access point, and an active pairwise transient key with the currently associated access point is used to secure the communication for new key derivation.
    Type: Application
    Filed: March 1, 2021
    Publication date: April 13, 2023
    Inventors: Andries VAN WAGENINGEN, Piotr POLAK, Sahil SHARMA
  • Publication number: 20230071470
    Abstract: The present disclosure provides a system for real-time health monitoring of one or more users. The system includes a computing device associated with a facility, a plurality of cameras, an AI edge device, and a communication network. Moreover, the system includes a server, a database, and a notification interface. The AI edge device monitors the health of one or more users in real-time. The AI edge device monitors the health of the one or more users by processing a video feed captured by the plurality of cameras. Further, the AI edge device notifies the health-related issues in real-time using the notification interface to a first set of users.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 9, 2023
    Inventors: Arvind Radhakrishnen, Manish Purohit, Sahil Sharma
  • Publication number: 20230022998
    Abstract: A data storage device including, in one implementation, a NAND memory and a controller. The NAND memory includes a read/write circuit configured to determine and store initial physical column addresses for each plane included in the NAND memory. The controller is configured to send a read-transfer command and a one-byte address to the NAND memory. The read/write circuit is also configured to retrieve a first initial physical column address from the initial physical column addresses stored in the NAND memory after the NAND memory receives the one-byte address from the controller. The first initial physical column address is associated with a die address and a plane address included in the one-byte address. The read/write circuit is further configured to retrieve a first set of data stored at the first initial physical column address. The read/write circuit is also configured to output the first set of data to the controller.
    Type: Application
    Filed: October 3, 2022
    Publication date: January 26, 2023
    Inventors: Grishma Shah, Daniel Tuers, Sahil Sharma, Hua-Ling Cynthia Hsu, Yenlung Li, Min Peng
  • Patent number: 11527300
    Abstract: A method, apparatus, and system for level dependent error correction code protection in multi-level non-volatile memory. A write command to write data to a non-volatile memory array may be received. At least one multi-level page of multi-level storage cells may be determined for the write data. A coding rate for the write data of the at least one multi-level page may be determined based on an attribute of the at least one multi-level page. An ECC codeword may be generated that satisfies the coding rate and includes the write data. The ECC codeword may then be stored on the at least one multi-level page.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: December 13, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Nian Yang, Sahil Sharma, Harish Singidi
  • Patent number: 11487446
    Abstract: A data storage device including, in one implementation, a NAND memory and a controller. The NAND memory includes a read/write circuit configured to determine and store initial physical column addresses for each plane included in the NAND memory. The controller is configured to send a read-transfer command and a one-byte address to the NAND memory. The read/write circuit is also configured to retrieve a first initial physical column address from the initial physical column addresses stored in the NAND memory after the NAND memory receives the one-byte address from the controller. The first initial physical column address is associated with a die address and a plane address included in the one-byte address. The read/write circuit is further configured to retrieve a first set of data stored at the first initial physical column address. The read/write circuit is also configured to output the first set of data to the controller.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: November 1, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Grishma Shah, Daniel Tuers, Sahil Sharma, Hua-Ling Cynthia Hsu, Yenlung Li, Min Peng
  • Patent number: 11416058
    Abstract: The present disclosure generally relates to efficient block usage after ungraceful shutdown (UGSD) events. After a UGSD event, a host device is alerted by the data storage device that a QLC block that was being used prior to the UGSD event is experiencing an ongoing block recovery and that the block is not yet available to accept new data. The block is then checked to determine whether the block can continue to be used for the programming that was occurring at the time of the UGSD event. Once a determination is made, the data storage device notifies the host device so that normal operations may continue. Additionally, the amount of free blocks available for programming is monitored during UGSD events so that the host device can be warned if a power loss halt is triggered.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: August 16, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Nian Niles Yang, Sahil Sharma, Judah Gamliel Hahn
  • Patent number: 11398288
    Abstract: A data storage system includes a storage medium and a storage controller configured to perform interface training operations. The interface training operations include loading a test data pattern into a first controller buffer of the storage controller, loading the test data pattern into a first storage medium buffer of the storage medium, setting a first read voltage or timing parameter at the storage controller, transferring the test data pattern from the first storage medium buffer to a second controller buffer of the storage controller using the first read voltage or timing parameter, comparing the test data pattern in the first controller buffer with the test data pattern in the second controller buffer, and determining a first read transfer error rate based on the first comparison.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: July 26, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Phil Reusswig, Sahil Sharma, Rohit Sehgal, Niles Yang
  • Patent number: 11385984
    Abstract: A method and apparatus for dynamically determining when, or how often, to do a read scan operation on a solid-state storage drive. One solution adjusts a read scan interval as part of performing a read scan operation. First, a bit error rate is determined for one of a plurality of storage blocks of a non-volatile memory array. Then, a cross temperature metric for the storage block is determined. A read scan interval is changed in response to the cross temperature metric satisfying a cross temperature threshold. Then, data in the storage block is relocated to a free storage block in response to the bit error rate satisfying a relocation threshold.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: July 12, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Nian Yang, Piyush Dhotre, Sahil Sharma
  • Publication number: 20220179568
    Abstract: A data storage device including, in one implementation, a NAND memory and a controller. The NAND memory includes a read/write circuit configured to determine and store initial physical column addresses for each plane included in the NAND memory. The controller is configured to send a read-transfer command and a one-byte address to the NAND memory. The read/write circuit is also configured to retrieve a first initial physical column address from the initial physical column addresses stored in the NAND memory after the NAND memory receives the one-byte address from the controller. The first initial physical column address is associated with a die address and a plane address included in the one-byte address. The read/write circuit is further configured to retrieve a first set of data stored at the first initial physical column address. The read/write circuit is also configured to output the first set of data to the controller.
    Type: Application
    Filed: February 12, 2021
    Publication date: June 9, 2022
    Inventors: Grishma Shah, Daniel Tuers, Sahil Sharma, Hua-Ling Cynthia Hsu, Yenlung Li, Min Peng
  • Patent number: 11354190
    Abstract: Methods and apparatus for storing parity bits in an available over provisioning (OP) space to recover data lost from an entire memory block. For example, a data storage device may receive data from a host device, write the data to a block, and generate a corresponding block parity. The device may then determine a bit error rate (BER) of the block and an average programming duration to write the data written to the block, calculate a probability of the block becoming defective based on the BER and the average programming duration, and comparing the probability of the block to a set of probabilities respectively corresponding to a set of worst-performing blocks in a NVM. Thereafter, the device may write the block parity to an available over provisioning (OP) space in the NVM responsive to the probability of the block being greater than any probability in the set of probabilities.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: June 7, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Rohit Sehgal, Sahil Sharma, Nian Niles Yang, Philip David Reusswig
  • Patent number: 11334256
    Abstract: A storage system and method for boundary wordline data retention handling are provided. In one embodiment, the storage system includes a memory having a single-level cell (SLC) block and a multi-level cell (MLC) block. The system determines if the boundary wordline in the MLC block has a data retention problem (e.g., by determining how long it has been since the boundary wordline was programmed). To address the data retention problem, the storage system can copy data from a wordline in the SLC block that corresponds to the boundary wordline in the MLC block to a wordline in another SLC block prior to de-committing the data in the SLC block. Alternatively, the storage system can reprogram the data in the boundary wordline using a double fine programing technique.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: May 17, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sahil Sharma, Nian Niles Yang, Phil Reusswig, Rohit Sehgal, Piyush A. Dhotre
  • Publication number: 20220129055
    Abstract: The present disclosure generally relates to efficient block usage after ungraceful shutdown (UGSD) events. After a UGSD event, a host device is alerted by the data storage device that a QLC block that was being used prior to the UGSD event is experiencing an ongoing block recovery and that the block is not yet available to accept new data. The block is then checked to determine whether the block can continue to be used for the programming that was occurring at the time of the UGSD event. Once a determination is made, the data storage device notifies the host device so that normal operations may continue. Additionally, the amount of free blocks available for programming is monitored during UGSD events so that the host device can be warned if a power loss halt is triggered.
    Type: Application
    Filed: February 24, 2021
    Publication date: April 28, 2022
    Inventors: Nian Niles YANG, Sahil SHARMA, Judah Gamliel HAHN
  • Publication number: 20220076249
    Abstract: Methods and systems are presented for creating and distributing blockchain-backed redistributable electronic content components. These techniques provider greater computer security and authentication controls, in various embodiments. An electronic content component associated with a first entity and a first set of actions is created. The electronic content component is published, and the first set of actions and a block representing the electronic content component are added to a blockchain. A second entity requests use of the electronic content component and a distribution agreement between the first and second entities associated with a second set of actions is created. The second set of actions and a block representing the distribution agreement are added to a blockchain. The electronic content component and distribution agreement are validated based on the blockchain, and custom content including the electronic content component is published.
    Type: Application
    Filed: September 4, 2020
    Publication date: March 10, 2022
    Inventors: Sahil Sharma, Ben William Gordon Hurst, Ping An, Purna Aditya Kumar Bhimaraju, Varun Kumar