Abstract: A non-volatile magneto-resistive memory positioned on a semiconductor substrate is shielded from stray magnetic fields by a passivation layer partially or completely surrounding the non-volatile magneto-resistive memory. The passivation layer includes non-conductive ferrite materials, such as Mn--Zn-Ferrite, Ni--Zn-Ferrite, MnFeO, CuFeO, FeO, or NiFeO, for shielding the non-volatile magneto-resistive memory from stray magnetic fields. The non-conductive ferrite materials may also be in the form of a layer which focuses internally generated magnetic fields on the non-volatile magneto-resistive memory to reduce power requirements.

Abstract: A method of resistless gate metal etch in the formation of a field effect transistor is disclosed, which includes providing a first layer of a first semiconductor material having a surface. A second layer of a second semiconductor material is formed on the surface and resistlessly patterned to define a masked and an unmasked portions. The unmasked portion of the second layer is etched away to the first layer to enable gate formation.

Abstract: A method of fabricating GMR devices on a CMOS substrate structure with a semiconductor device formed therein. The method includes forming a dielectric system with a planar surface having a roughness in a range of 1 .ANG. to 20 .ANG. RMS on the substrate; disposing and patterning films of giant magneto-resistive material on the planar surface so as to form a memory cell; disposing a dielectric cap on the cell so as to seal the cell and provide a barrier to subsequent operations; forming vias through the dielectric cap and the dielectric system to interconnects of the semiconductor device; forming vias through the dielectric cap to the magnetic memory cell; and depositing a metal system through the vias to the interconnects and to the memory cell.

Abstract: A new magnetic random access memory (MRAM) unit (30) is provided suitable for fabricating a MRAM device (20). The MRAM cell includes a magnetic storage element (32) and a current control element (33), for example, a diode, connected to the magnetic storage element in series to control a current in the magnetic storage element. The magnetic storage element has two magnetoresistive layers (36,38) separated by a non-magnetic layer (37), for example, aluminum oxide (Al.sub.2 O.sub.3). The diode allows a current to flow in only an MRAM cell activated by a column line and a row line.

Abstract: Spin polarized apparatus includes a spin polarizing section of magnetic material with an electron input port and a polarized electron port and a transport section of magnetic material with a polarized electron input port electrically coupled to the polarized electron port of the polarizing section and an electron output port. Electrons traversing the polarizing section all have similar spin directions at the output dependent upon the magnetization direction of the polarizing section. Electrons traversing the transport section all have spins in a first direction at the output. The cell has a low resistance when the magnetization direction of the polarizing section is in the first direction (electrons entering the transport section all have spins in the first direction) and a high resistance when the magnetization direction is in an opposite direction (electrons entering the transport section all have spins in the opposite direction).

Abstract: A semiconductor device including a plurality of layers of material defining a diffusion barrier. A defect generator positioned on the plurality of layers in overlying relationship to the diffusion barrier so as to produce a collection of defects at the diffusion barrier that operates as a current restriction. In a typical example, an ohmic contact is positioned around the mesa of a ridge VCSEL, which ohmic contact generates defects that accumulate at a hetero-interface near the active area and confine the current flow to a lasing volume of the VCSEL.

Abstract: A new and improved magnetic device is provided for memories and sensors. A magnetic random access memory (MRAM) device (20) includes a storage element (21) for magnetically storing states and an amplifier (25) for sensing the states stored in the storage element. A circuit (27) for dissipating electrical charges are coupled to inputs (23,24) of the amplifier (25) to discharge electrical charges applied to the inputs (23,24) of the amplifier (25). The charge dissipating circuit (27) includes junctions (271-274) which are typically connected in series between power (255) and common (257) lines. Electric charges applied to the inputs (23,24) of the amplifier (25) is discharged through the junctions (271-274).

Abstract: A magnetic memory cell with increased GMR ratio includes first and second layers of magnetic material stacked in parallel, overlying relationship and separated by a layer of non-magnetic material sandwiched between the first and second layers of magnetic material. Each of the first and second layers is switchable between a first and a second magnetic state and is formed to switch states with the application of a substantially equal magnetic field. A third layer of magnetic material is positioned adjacent one of the first and second layers of magnetic material so as to alter the amount of magnetic field required to switch the states of the one of the first and second layers of magnetic material. The third layer of magnetic material can be formed with a width larger than the cell width to increase the magnetic width of the cell and reduce the magnetic field required to switch states.

Abstract: A nonvolatile programmable switch includes first and second magnetizable conductors having first and second ends, respectively, each of which is a north or south pole. The ends are mounted for relative movement between a first position in which they are in contact and a second position in which they are insulated from each other. The first conductor is permanently magnetized and the second conductor is switchable in response to a magnetic field applied thereto. Programming means are associated with the second conductor for switchably magnetizing the second conductor so that the second end is alternatively a north or south pole. The first and second ends are held in the first position by magnetic attraction and in the second position by magnetic repulsion.

Abstract: A method of fabricating a plurality of spaced apart submicron memory cells is disclosed, including the steps of depositing a magnetoresistive system on a substrate formation, depositing and patterning a first layer of material to form sidewalls, and depositing a second, selectively etchable, layer of material on the first layer of material, etching the second layer of material to define spacers on the sidewalls of the first layer of material, etching the magnetoresistive system, using the spacers as a mask, to define a plurality of spaced apart submicron magnetic memory cells, and depositing electrical contacts on the plurality of spaced apart submicron magnetic memory cells.

Abstract: A first layer of non-magnetic material is positioned on a layer of an oxide of a magnetic material (e.g. NiO). First and second layers of magnetic material are stacked in parallel, overlying relationship and separated by a second layer of non-magnetic material sandwiched therebetween to form a magnetic memory cell. The magnetic memory cell is positioned on the first layer of nonmagnetic material so as to sandwich the first nonmagnetic layer between the oxide and the first magnetic layer of the cell. The first layer of non-magnetic material has a thickness (e.g. approximately 7 .ANG.) which prevents the oxide from pinning the first layer of magnetic material and adapts the first layer of magnetic material to the layer of oxide so as to increase the GMR ratio of the magnetic memory cell.

Abstract: A magnetic device (40) having multi-layer (41-45) with insulating layer (45) and conductive layer (42). The conductive layer (42) is positioned between a first magnetic layer (41) and a third magnetic layer (44). The insulating layer (45) is positioned between a second magnetic layer (43) and the third magnetic layer (44), and which forms a tunnel junction between the second and third layers. Magnetic vectors in the first magnetic layer (41) magnetically couple with ones in the second magnetic layer (43) so that the magnetic coupling loop formed around the third magnetic layer (44) allows magnetic vectors in the third magnetic layer (44) to be switchable in a low magnetic field. Consequently, total power consumption of the magnetic device (60) decreases.

Abstract: A plurality of layers of magnetic material are stacked in parallel, overlying relationship and separated by layers of non-magnetic material so as to form a multi-layer magnetic memory cell. The width of the cell is less than a width of magnetic domain walls within the magnetic layers so that magnetic vectors in the magnetic layers point along a length of the magnetic layers, and the ratio of the length to the width of the magnetic memory cell is in a range of 1.5 to 10. The magnetic layers are antiferromagnetically coupled when the ratio is less than 4 and ferromagnetically coupled when the ratio is greater than 4.

Abstract: A multi-layer magnetic memory cell is provided, with magnetic vectors aligned along a length of the cell. To align the magnetic end vectors, an ellipsoidal shape is formed at the ends of the memory cell. Magnetic vectors aligned along the length prevent from forming high fields and magnetic poles at the discontinuity or ends of the layers. The memory cell with the ellipsoidal shape shows a constant magnetic resistance of the magnetic cell when a magnetic field is applied to the cell and attains a reduction of power consumption for the magnetic cell.

Abstract: A multi-layer magnetic memory cell is provided, with magnetic end vectors adjacent the ends of the cell pinned in a fixed direction. To pin the magnetic end vectors, a magnetic field is applied to an end of at least one of the layers of magnetic material in the cell to move the magnetic end vectors in the magnetic material at the end of the cell into a fixed direction. Pinning material is then disposed adjacent to the end to maintain the magnetic end vectors in the magnetic material at the end of the cell in the fixed direction.

Abstract: Improved methods for selecting memory cells in magnetic random access memory (MRAM) are provided. Whenever a state in a memory cell is sensed, a MRAM requires to adjust an output of comparator to a zero voltage (auto-zeroing step) before the content of memory cell is detected. This invention sequentially accesses memory cells 29-30 once sense line 25 is selected and auto-zeroed. Accordingly, a higher speed operation is attained because the invention does not require an auto-zeroing step every sensing a memory cell.

Abstract: A multi-layer magnetic memory cell including two similar layers of magnetic material stacked in parallel, overlying relationship and separated by a layer of non-magnetic material. Each of the two similar layers have a width that is less than a width of magnetic domain walls within the layer of magnetic material so that magnetic vectors in the two similar layers point along the length thereof. The two similar layers define a central plane parallel with the two similar layers symmetrically formed and positioned thereabout. Magnetic vectors in the two similar layers are switched simultaneously and the two similar layers are positioned close enough together to allow mutual cancellation of pole effects during simultaneous switching of the magnetic vectors.

Abstract: A stable FET including a substrate structure with a doped layer formed as a portion of the substrate structure and defining an electrically conductive shielding region adjacent a surface of the substrate structure. A channel region is positioned on the shielding region and includes a plurality of epitaxial layers grown on the surface of the substrate structure in overlying relationship to the doped layer. A drain and a source are positioned on the channel region in spaced relationship from each other with a gate positioned in overlying relationship on the channel region between the drain and source. An externally accessible electrical contact is connected to the shielding region and to the source region to provide a path for the removal of internally generated charges, such as holes.

Abstract: A multi-state, multi-layer magnetic memory cell including a first conductor, a first magnetic layer contacting the first conductor, an insulating layer on the first magnetic layer, a second magnetic layer on the insulating layer, a second conductor contacting the second magnetic layer, and a word line adjacent, or in contact with, the cell so as to provide a magnetic field to partially switch magnetic vectors along the length of the first magnetic layer. Information is stored by passing one current through the word line and a second current through the first and second conductors sufficient to switch vectors in the first and second magnetic layers. Sensing is accomplished by passing a read current through a word line sufficient to switch one layer (and not the other) and a sense current through the cell, by way of the first and second conductors, and measuring a resistance across the cell.

Abstract: A method of fabricating semiconductor devices with a passivated surface includes providing first cap and etch stop layers and second cap and etch stop layers with a contact layer thereon so as to define an inter-electrode surface area. A first layer and an insulating layer, which are selectively etchable relative to each other, are deposited on the contact layer and the inter-electrode surface area. The insulating layer and the first layer are individually etched to define an electrode contact area and to expose the inter-electrode surface area. Portions of the first etch stop and cap layers remaining in the contact area are selectively removed and a metal contact is formed in the contact area in abutting engagement with the insulating layer so as to seal the inter-electrode surface area.