Abstract: Provided are a method, system and article of manufacture for controlling one or more I/O devices coupled to a local bus. A local bus function is associated with the one or more I/O devices. A register corresponding to the local bus function is configured as a memory address. The one or more I/O devices are controlled via the configured register.

Abstract: Provided are a method, system, and program for receiving a read request that is one of a plurality of read requests directed toward sequential data and determining whether at least one previous read request for sequential data preceding the data requested by the received read request was not processed. Data is returned to the received read request in response to returning data to the at least one previous read request.

Abstract: Provided are a method, system, and program for a local bus system. A memory address space in configured to control an I/O device. The memory address space is associated with a port coupled to the local bus system.

Abstract: Provided are a method, system, and program that configures an address window of a device controller that communicates with an initiator over a bus, wherein the device controller accesses requests transmitted to one address in the address window on the bus, and configures a maximum number of outstanding read requests the initiator is capable of having to memory addresses in the address window based on a size of the address window.

Abstract: Provided are a method, system and article of manufacture for controlling one or more I/O devices coupled to a local bus. A local bus function is associated with the one or more I/O devices. A register corresponding to the local bus function is configured as a memory address. The one or more I/O devices are controlled via the configured register.

Abstract: Provided are a method, system, and program for handling Input/Output (I/O) requests. A bus enables communication with an initiator, target device and device controller, wherein the device controller accesses the target device to execute I/O commands directed to the target device. An I/O request command is received to access the target device. The initiator is configured to transmit at least one data request on the bus to one memory address in a predefined address window of the device controller. Te device controller is enabled to claim the data request to the memory address in the predefined address window from the initiator on the bus to execute the data request against the target device.

Abstract: Provided are a method, system, and program for receiving a read request that is one of a plurality of read requests directed toward sequential data and determining whether at least one previous read request for sequential data preceding the data requested by the received read request was not processed. Data is returned to the received read request in response to returning data to the at least one previous read request.

Abstract: Provided are a method, system, and program for a local bus system. A memory address space in configured to control an I/O device. The memory address space is associated with a port coupled to the local bus system.

Abstract: Provided are a method, system, and program that configures an address window of a device controller that communicates with an initiator over a bus, wherein the device controller accesses requests transmitted to one address in the address window on the bus, and configures a maximum number of outstanding read requests the initiator is capable of having to memory addresses in the address window based on a size of the address window.

Abstract: A memory system provides one or more control signals for configuring and controlling a memory sub-system during a power failure or system reset. A power delay circuit and a power fail controller cooperate to quickly place the memory system in a retention state in the event a power failure event is detected. The power delay circuit detects either a reset signal or power failure to initiate the memory retention state. The power delay circuit and power fail controller ensure the memory system is initialized prior to entering the retention state.

Abstract: A method and apparatus for introducing a programmable delay during replay of isochronous data packets is described. The method includes, determining an initial delay point. In particular, the initial delay point is determined by the transmission rate, playback rate, and the desired buffer storage size. The method also includes, introducing a programmable delay to synchronize playback of multiple data streams across multiple destination devices. The apparatus includes, a buffer, a switching device, a counter, and control logic to insert the programmable delay.