Patents by Inventor Sakae Koyata
Sakae Koyata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7456106Abstract: Provided is a method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the chamfered wafer, a mild lapping step for abrading away part of processing distortions on the rear surface of the wafer left after chamfering and lapping, a rear-surface mild polishing step for abrading away part of roughness on the rear surface of the wafer, an etching step for alkali-etching the remains of processing distortions on the front and rear surfaces of the wafer, a front-surface mirror-polishing step for mirror-polishing the front surface of the etched wafer, and a cleaning step for cleaning the mirror-polished wafer.Type: GrantFiled: October 1, 2004Date of Patent: November 25, 2008Assignee: Sumitomo Mitsubishi Silicon CorporationInventors: Sakae Koyata, Kazushige Takaishi, Tohru Taniguchi, Kazuo Fujimaki
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Publication number: 20080214094Abstract: A method for manufacturing a silicon wafer comprises a slicing step of a silicon single crystal ingot to obtain sliced wafers, a single-side grinding step to grind only one side of a wafer, and a smoothing step to smooth the other side of the wafer by controlling application of etchant depending on surface profile of the other side of the wafer. According to a method of the present invention a silicon wafer that has high flatness, is removed machine working damage, and is reduced of profile change of chamfer to be minimal can be manufactured.Type: ApplicationFiled: February 15, 2008Publication date: September 4, 2008Inventors: Takeo KATOH, Yasuyuki Hashimoto, Kazushige Takaishi, Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata
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Patent number: 7338904Abstract: A surface of a semiconductor wafer which has been lapped is ground. This removes a damage caused on the wafer surface during lapping, thereby increasing the flatness of the wafer surface. Next, the wafer is subjected to composite etching and the both surfaces are polished, i.e., subjected to mirror polishing while the wafer rear surface is slightly polished so as to obtain a single-side mirror surface wafer having a difference between the front and the rear surfaces. As compared to mere acid etching or alkali etching, it is possible to manufacture a single-side mirror surface wafer having a higher flatness.Type: GrantFiled: December 3, 2004Date of Patent: March 4, 2008Assignee: SUMCO CorporationInventors: Sakae Koyata, Tadashi Denda, Masashi Norimoto, Kazushige Takaishi
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Publication number: 20070298614Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.Type: ApplicationFiled: August 15, 2007Publication date: December 27, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20070298618Abstract: An alkali etchant for controlling surface roughness of a semiconductor wafer, which is a sodium hydroxide solution or a potassium hydroxide solution having a weight concentration of 55 wt % to 70 wt %.Type: ApplicationFiled: March 25, 2005Publication date: December 27, 2007Applicant: SUMCO CORPORATIONInventors: Sakae Koyata, Kazushige Takaishi
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Publication number: 20070267387Abstract: The processing method of a silicon wafer of the present invention includes an etching process (13) in which acid etching solution and alkali etching solution are stored in plural etching tanks, respectively and a wafer having degraded superficial layers gone through a cleaning process (12) subsequent to a lapping process (11) is immersed into the acid etching solution and the alkali etching solution in order, a front surface mirror-polishing process (18) to mirror-polish one surface of the etched wafer, and a cleaning process (19) to clean the front surface mirror-polished wafer, wherein the etching process is performed by the alkali etching after the acid etching, and wherein the acid etching solution contains phosphoric acid equal to or more than 30 percent by weight in the acid aqueous water solution 100 percent by weight mainly composed of hydrofluoric acid and nitric acid.Type: ApplicationFiled: October 28, 2004Publication date: November 22, 2007Inventors: Sakae Koyata, Kazushige Takaishi
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Patent number: 7288207Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: GrantFiled: January 31, 2006Date of Patent: October 30, 2007Assignee: Sumco CorporationInventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Publication number: 20070224821Abstract: This silicon wafer production process comprises in the order indicated a planarization step, in which the front surface and the rear surface of a wafer are ground or lapped, a single-wafer acid etching step, in which an acid etching liquid is supplied to the surface of the wafer while spinning and the entire wafer surface is etched to control the surface roughness Ra to 0.20 ?m or less, and a double-sided simultaneous polishing step, in which the front surface and the rear surface of the acid etched wafer are polished simultaneously. The process may comprise a single-sided polishing step, in which the top and bottom of the acid etched wafer are polished in turn, instead of the double-sided simultaneously polishing step.Type: ApplicationFiled: September 2, 2005Publication date: September 27, 2007Applicant: SUMCO CORPORATIONInventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takatshi, Takeo Katoh
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Publication number: 20070184658Abstract: A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.Type: ApplicationFiled: March 19, 2007Publication date: August 9, 2007Inventors: Sakae Koyata, Yuichi Kakizono, Tomohiro Hashii, Katsuhiko Murayama
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Publication number: 20070175863Abstract: An object of the present invention is to provide a single wafer etching apparatus realizing a high flatness of wafers and an increase in productivity thereof. In the single wafer etching apparatus, a single thin disk-like wafer sliced from a silicon single crystal ingot is mounted on a wafer chuck and spun thereon, and an overall front surface of the wafer is etched with an etching solution supplied thereto by centrifugal force generated by spinning the wafer 11. The singe wafer etching apparatus includes a plurality of supply nozzles 26, 27 capable of discharging the etching solution 14 from discharge openings 26a, 27a onto the front surface of the wafer 11, nozzle-moving devices each capable of independently moving the plurality of supply nozzles 28, 29, and an etching solution supplying device 30 for supplying the etching solution 14 to each of the plurality of supply nozzles and discharging the etching solution 14 from each of the discharge openings to the front surface of the wafer 11.Type: ApplicationFiled: January 31, 2007Publication date: August 2, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20070161247Abstract: Local shape collapse of a wafer end portion is suppressed to the minimum level, and a wafer front surface as well as a wafer end portion is uniformly etched while preventing an etchant from flowing to a wafer rear surface. There is provided an etching method of a single wafer which supplies an etchant onto a wafer front surface in a state where a single wafer having flattened front and rear surfaces is held, and etches the wafer front surface and a front surface side end portion by using a centrifugal force generated by horizontally rotating the wafer. According to this method, the etchant is intermittently supplied onto the front surface of the wafer in twice or more, supply of the etchant is stopped after the etchant for one process is supplied, and the etchant for the next process is supplied after the supplied etchant flows off from the end portion of the wafer.Type: ApplicationFiled: July 19, 2006Publication date: July 12, 2007Inventors: Sakae KOYATA, Tomohiro HASHII, Katsuhiko MURAYAMA, Kazushige TAKAISHI, Takeo KATOH
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Publication number: 20070158308Abstract: A surface of a semiconductor wafer which has been lapped is ground. This removes a damage caused on the wafer surface during lapping, thereby increasing the flatness of the wafer surface. Next, the wafer is subjected to composite etching and the both surfaces are polished, i.e., subjected to mirror polishing while the wafer rear surface is slightly polished so as to obtain a single-side mirror surface wafer having a difference between the front and the rear surfaces. As compared to mere acid etching or alkali etching, it is possible to manufacture a single-side mirror surface wafer having a higher flatness.Type: ApplicationFiled: December 3, 2004Publication date: July 12, 2007Applicant: SUMCO CORPORATIONInventors: Sakae Koyata, Tadashi Denda, Masashi Norimoto, Kazushige Takaishi
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Patent number: 7226864Abstract: Provided is an improved method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the wafer, an etching step for removing processing distortions on the wafer surfaces, a mirror-polishing step for mirror-polishing the surface of the wafer, and a cleaning step for cleaning the wafer. The etching step further comprises a first acid-etching phase and a second alkali-etching phase, and a rear surface mild polishing step is introduced between the first and second etching phases in order to abrade part of roughness formed on the rear surface of the wafer as a result of the first etching phase.Type: GrantFiled: October 1, 2004Date of Patent: June 5, 2007Assignee: Sumitomo Mitsubishi Silicon CorporationInventors: Sakae Koyata, Kazushige Takaishi, Tohru Taniguchi, Kazuo Fujimaki, Akihiro Kudo, Masashi Norimoto
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Publication number: 20070119817Abstract: The manufacturing method of a silicon wafer of the present invention includes an etching process (14) storing acid etching solution and alkali etching solution in plural etching tanks, respectively, and immersing a silicon wafer gone through a lapping process and having degraded superficial layers in the acid etching solution and the alkali etching solution in order so as to remove the degraded superficial layers; and a double surface polishing process (16) to simultaneously polish the front and rear surfaces of the wafer after the etching process; wherein sodium hydroxide aqueous solution of 40 to 60 percent by weight is used in the alkali etching solution of the etching process, and the polishing removal depth A in the wafer front surface is made 5 to 10 ?m in the double surface simultaneous polishing process, and the polishing removal depth B in the rear surface is made 2 to 6 ?m, and a difference (A-B) between the polishing removal depth A and the polishing removal depth B is made 3 to 4 ?m.Type: ApplicationFiled: October 28, 2004Publication date: May 31, 2007Applicant: SUMCO CORPORATIONInventors: Sakae Koyata, Kazushige Takaishi
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Publication number: 20070087568Abstract: An apparatus for etching a wafer by a single-wafer process comprises a fluid supplying device which feeds an etching fluid on a wafer, and a wafer-chuck for horizontally holding the wafer. The wafer-chuck is equipped with a gas injection device for injecting a gas to the wafer, a first fluid-aspirating device, and a second fluid-aspirating device. The etching fluid supplied on the wafer is spread by a rotation of the wafer. The etching fluid is scattered by a centrifugal force, or flows down over an edge portion of the wafer and is blown-off by the gas injected from the gas injection unit, and is aspirated by the first fluid-aspirating device or the second fluid-aspirating device.Type: ApplicationFiled: October 17, 2006Publication date: April 19, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20070042567Abstract: A process for producing a silicon wafer comprising a single-wafer etching step of performing an etching by supplying an etching solution through a supplying-nozzle to a surface of a single and a thin-discal wafer obtained by slicing a silicon single crystal ingot and rotating the wafer to spread the etching solution over all the surface of the wafer; and a grinding step of grinding the surface of the wafer, in this order, wherein the etching solution used in the single-wafer etching step is an aqueous acid solution which contains hydrogen fluoride, nitric acid, and phosphoric acid in an amount such that the content of which by weight % at a mixing rate of fluoric acid: nitric acid: phosphoric acid is 0.5 to 40%: 5 to 50%: 5 to 70%, respectively.Type: ApplicationFiled: August 15, 2006Publication date: February 22, 2007Inventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Publication number: 20060264158Abstract: An apparatus for polishing wafers and a process for polishing wafers are provided. The apparatus for polishing a wafer which polishes the wafer W held by a carrier plate which rotates around an axis, by pressing and rubbing the wafer to a polishing pad disposed to a polishing platen 12 which rotates around another axis which differs from said axis, in which the polishing pad 11 is equipped with plural areas including a first area 11a and a second area 11b having hardness different from each other, each of the first 11a area and second area 11b being formed at a distribution and/or an area ratio such that the rate of the time or distance that the wafer W passes through the first area 11a during polishing to the time or distance that the wafer W passes through the second area 11b during polishing becomes a predetermined value.Type: ApplicationFiled: May 11, 2006Publication date: November 23, 2006Inventors: Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata, Kazushige Takaishi
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Publication number: 20060264157Abstract: This wafer polishing apparatus includes: a polishing plate having a polishing pad; a carrier plate which is placed facing the polishing pad and which slides and presses wafers against the polishing pad, while rotating in a state of holding the wafers; and an abrasive slurry supply device, wherein the abrasive slurry supply device is able to supply different abrasive slurries, each of the abrasive slurries contains abrasives of which the average grain size is different from those contained in the other abrasive slurries. This method for polishing wafers includes: while supplying an abrasive slurry to a surface of a polishing pad, sliding and pressing wafers against the polishing pad, wherein different abrasive slurries are supplied to the surface of the polishing pad, and each of the abrasive slurries contains abrasives of which the average grain size is different from those contained in the other abrasive slurries.Type: ApplicationFiled: May 11, 2006Publication date: November 23, 2006Inventors: Tomohiro Hashii, Katsuhiko Murayama, Sakae Koyata, Kazushige Takaishi
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Publication number: 20060252272Abstract: The inventive method for processing a silicon wafer is a method comprising step 11 in which a single crystal ingot is sliced into thin disc-like wafers; step 13 in which the surface of each wafer is lapped to be planar; step 14 in which the wafer is subjected to alkaline cleaning to be removed of contaminants resulting from preceding machining; and step 16 in which the wafer is alternately transferred between two groups of etching tanks one of which contain acidic etching solutions and the other alkaline etching solutions, wherein an additional step 12 is introduced between step 11 and step 13 in which a wafer is immersed in an acidic solution containing hydrofluoric acid (HF) and nitric acid (HNO3) at a volume ratio of ? to ½ (HF/HNO3) so that degraded superficial layers occurring on the front and rear surfaces of the wafer as a result of machining can be removed and the edge surface of the wafer can be beveled.Type: ApplicationFiled: May 24, 2004Publication date: November 9, 2006Inventors: Sakae Koyata, Kazushige Takaishi
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Publication number: 20060194441Abstract: The invention is improvement of a silicon wafer etching method of storing an acid etching solution and an alkali etching solution respectively in plural etching tanks, and immersing a silicon wafer having a work-degenerated layer, which has experienced a lapping process and then a cleaning process, in the acid etching solution and the alkali etching solution in order. Its characteristic configuration is in that an alkali etching process is performed after an acid etching process, the etching removal depth for acid etching is made to be equal to or larger than the etching removal depth for alkali etching, and the etching rate of acid etching is made to be 0.0075 ?m/sec to 0.05 ?m/sec in total of the obverse and the reverse of the silicon wafer.Type: ApplicationFiled: February 25, 2005Publication date: August 31, 2006Inventors: Sakae Koyata, Kazushige Takaishi, Masashi Norimoto