Patents by Inventor Sameer S. Pradhan

Sameer S. Pradhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TUNGSTEN GATES FOR NON-PLANAR TRANSISTORS
    Publication number: 20160035725
    Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.
    Type: Application
    Filed: September 21, 2015
    Publication date: February 4, 2016
    Applicant: INTEL CORPORATION
    Inventors: Sameer S. Pradhan, DANIEL B. BERGSTROM, JIN-SUNG CHUN, JULIA CHIU
  • Capping dielectric structure for transistor gates
    Patent number: 9202699
    Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: December 1, 2015
    Assignee: Intel Corporation
    Inventors: Aaron W. Rosenbaum, Din-How Mei, Sameer S. Pradhan
  • Tungsten gates for non-planar transistors
    Patent number: 9177867
    Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: November 3, 2015
    Assignee: Intel Corporation
    Inventors: Sameer S. Pradhan, Daniel B. Bergstrom, Jin-Sung Chun, Julia Chiu
  • SOURCE/DRAIN CONTACTS FOR NON-PLANAR TRANSISTORS
    Publication number: 20150155385
    Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.
    Type: Application
    Filed: February 10, 2015
    Publication date: June 4, 2015
    Applicant: INTEL CORPORATION
    Inventors: Sameer S. Pradhan, Subhash M. Joshi, Jin-Sung Chun
  • Source/drain contacts for non-planar transistors
    Patent number: 8981435
    Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.
    Type: Grant
    Filed: October 1, 2011
    Date of Patent: March 17, 2015
    Assignee: Intel Corporation
    Inventors: Sameer S. Pradhan, Subhash M. Joshi, Jin-Sung Chun
  • TUNGSTEN GATES FOR NON-PLANAR TRANSISTORS
    Publication number: 20150041926
    Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.
    Type: Application
    Filed: September 30, 2011
    Publication date: February 12, 2015
    Inventors: Sameer S. Pradhan, Daniel B. Bergstrom, Julia Chiu
  • SOURCE/DRAIN CONTACTS FOR NON-PLANAR TRANSISTORS
    Publication number: 20130256767
    Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.
    Type: Application
    Filed: October 1, 2011
    Publication date: October 3, 2013
    Inventors: Sameer S. Pradhan, Sabhash M. Joshi, Jin-Sung Chun
  • CAPPING DIELECTRIC STRUCTURE FOR TRANSISTOR GATES
    Publication number: 20130248952
    Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.
    Type: Application
    Filed: September 30, 2011
    Publication date: September 26, 2013
    Inventors: Aaron W. Rosenbaum, Din-How Mei, Sameer S. Pradhan