Patents by Inventor Sameer Wadhwa

Sameer Wadhwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190171243
    Abstract: A wide-tuning range low output impedance flip voltage follower (FVF) low dropout regulator (LDO) for large capacitor switching loads is disclosed. In some implementations, a touch sensing controller driver includes the LDO, which has an operational amplifier and a FVF. The FVF can have a gain device, a source follower device, and an adaptive level shifter coupled between a drain of the source follower device and a gate of the gain device.
    Type: Application
    Filed: October 29, 2018
    Publication date: June 6, 2019
    Inventors: Mahmoud Mohamed Rashad Ibrahim ELHEBEARY, Sameer WADHWA
  • Patent number: 10277244
    Abstract: Certain aspects of the present disclosure provide a successive approximation register (SAR) analog-to-digital converter (ADC) implemented with a passive gain scaling architecture. Certain aspects provide a circuit for analog-to-digital conversion. The circuit generally includes a plurality of capacitive elements, a plurality of switches coupled to the plurality of capacitive elements, and SAR logic having an output coupled to control inputs of the plurality of switches. The circuit also includes a comparator having an output coupled to an input of the SAR logic, a sampling circuit coupled to an input node of the circuit, and a first capacitive element coupled in series between the sampling circuit and the plurality of capacitive elements.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 30, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Ankit Srivastava, Sameer Wadhwa, Shunxi Wang
  • Patent number: 10152072
    Abstract: A wide-tuning range low output impedance flip voltage follower (FVF) low dropout regulator (LDO) for large capacitor switching loads is disclosed. In some implementations, the LDO includes an operational amplifier and a FVF. The FVF can have a gain device, a source follower device, and an adaptive level shifter coupled between a drain of the source follower device and a gate of the gain device.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: December 11, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Mahmoud Mohamed Rashad Ibrahim Elhebeary, Sameer Wadhwa
  • Publication number: 20180310921
    Abstract: Apparatus and method for generating a DC pixel voltage are disclosed. The apparatus includes an amplifier configured to amplify an input signal to generate a voltage signal, wherein the input signal is generated in response to an ultrasonic wave reflecting off an item-to-be-imaged and propagating via a piezoelectric layer; a noise reduction circuit configured to pass the voltage signal from an output of the amplifier to a node, while reducing a propagation of noise from the output of the amplifier to the node; and a circuit configured to generate a DC pixel voltage based on the reduced-noise voltage signal.
    Type: Application
    Filed: June 28, 2018
    Publication date: November 1, 2018
    Inventors: Sameer WADHWA, Lennart Karl-Axel MATHE
  • Patent number: 10039526
    Abstract: Apparatus and method for generating a DC pixel voltage are disclosed. The apparatus includes an amplifier configured to amplify an input signal to generate a voltage signal, wherein the input signal is generated in response to an ultrasonic wave reflecting off an item-to-be-imaged and propagating via a piezoelectric layer; a noise reduction circuit configured to pass the voltage signal from an output of the amplifier to a node, while reducing a propagation of noise from the output of the amplifier to the node; and a circuit configured to generate a DC pixel voltage based on the reduced-noise voltage signal.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: August 7, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Sameer Wadhwa, Lennart Karl-Axel Mathe
  • Patent number: 10004432
    Abstract: An apparatus, such as a pixel sensor for an ultrasonic imaging apparatus, is disclosed. The apparatus includes a first metallization layer coupled to a piezoelectric layer, wherein a first voltage is formed at the first metallization layer in response to an ultrasonic wave reflecting off an item-to-be-imaged (e.g., a user's fingerprint) and propagating through the piezoelectric layer, and wherein the first metallization layer is situated above a substrate; a second metallization layer situated between the first metallization layer and the substrate; and a device configured to apply a second voltage to the second metallization layer to reduce a parasitic capacitance between the first metallization layer and the substrate.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: June 26, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Lennart Karl-Axel Mathe, Sameer Wadhwa, Lingli Xia
  • Publication number: 20180052558
    Abstract: The present disclosure describes aspects of a capacitance-to-voltage modulation circuit. In some aspects, the circuit is used in touch sensing. In some aspects, a modulation circuit comprises a first pair of switches having one switch connected between a voltage source and a capacitor, and another switch connected between ground and the input of the circuit. The circuit also includes a second pair of switches having one switch connected between the voltage source and the input of the circuit, and another switch connected between ground and the capacitor. A third pair of the circuit's switches comprise one switch connected between the capacitor and an input of an analog-to-digital converter (ADC) and another switch connected between the input of the circuit and the input of the ADC. The third pair of switches may enable charge sharing of signals modulated by the first and second pairs of switches, a result of which can used to sense touch input based on capacitance at the input of the circuit.
    Type: Application
    Filed: September 20, 2016
    Publication date: February 22, 2018
    Inventors: Bo-Ren WANG, Lennart MATHE, Sameer WADHWA, Nathan ALTMAN, Sandeep D'SOUZA
  • Publication number: 20170079624
    Abstract: Apparatus and method for generating a DC pixel voltage are disclosed. The apparatus includes an amplifier configured to amplify an input signal to generate a voltage signal, wherein the input signal is generated in response to an ultrasonic wave reflecting off an item-to-be-imaged and propagating via a piezoelectric layer; a noise reduction circuit configured to pass the voltage signal from an output of the amplifier to a node, while reducing a propagation of noise from the output of the amplifier to the node; and a circuit configured to generate a DC pixel voltage based on the reduced-noise voltage signal.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 23, 2017
    Inventors: Sameer Wadhwa, Lennart Karl-Axel Mathe
  • Publication number: 20170059699
    Abstract: An apparatus, such as a pixel sensor for an ultrasonic imaging apparatus, is disclosed. The apparatus includes a first metallization layer coupled to a piezoelectric layer, wherein a first voltage is formed at the first metallization layer in response to an ultrasonic wave reflecting off an item-to-be-imaged (e.g., a user's fingerprint) and propagating through the piezoelectric layer, and wherein the first metallization layer is situated above a substrate; a second metallization layer situated between the first metallization layer and the substrate; and a device configured to apply a second voltage to the second metallization layer to reduce a parasitic capacitance between the first metallization layer and the substrate.
    Type: Application
    Filed: September 1, 2015
    Publication date: March 2, 2017
    Inventors: Lennart Karl-Axel Mathe, Sameer Wadhwa, Lingli Xia
  • Patent number: 9473165
    Abstract: Reducing signal dependence for a reference voltage of a CDAC includes: splitting a decoupling capacitor into a plurality of capacitors smaller in size than a size of the decoupling capacitor; isolating at least one of the plurality of capacitors from a sampling buffer coupled to the reference voltage during a conversion phase; and supplying an appropriate amount of charge needed to replenish charge drawn by capacitors in the CDAC at each conversion step using a charge pump to pump in a dummy charge to the CDAC so that resulting configurations of the CDAC draw substantially similar amount of charge for each code change of the each conversion step.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: October 18, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Seyed Arash Mirhaj, Sameer Wadhwa, Dinesh Jagannath Alladi, Kentaro Yamamoto, Xiaoke Wen, Masoud Ensafdaran, Weihua Chen
  • Publication number: 20160056833
    Abstract: Reducing signal dependence for a reference voltage of a CDAC includes: splitting a decoupling capacitor into a plurality of capacitors smaller in size than a size of the decoupling capacitor; isolating at least one of the plurality of capacitors from a sampling buffer coupled to the reference voltage during a conversion phase; and supplying an appropriate amount of charge needed to replenish charge drawn by capacitors in the CDAC at each conversion step using a charge pump to pump in a dummy charge to the CDAC so that resulting configurations of the CDAC draw substantially similar amount of charge for each code change of the each conversion step.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 25, 2016
    Inventors: Seyed Arash Mirhaj, Sameer Wadhwa, Dinesh Jagannath Alladi, Kentaro Yamamoto, Xiaoke Wen, Masoud Ensafdaran, Weihua Chen
  • Patent number: 8975974
    Abstract: A wide frequency, low voltage oscillator includes multiple delay elements, in which each delay element includes two inverters coupled through a latching element into a differential-type configuration. Two current-source PMOS devices bias the latching element in a high-gain region at low-voltage. By coupling these current-source PMOS devices into the delay elements, the start-up voltage of the latching element is reduced. Each delay element is also biased using a replica bias circuit that scales the supply/control voltage of the oscillator and provides the scaled supply/control voltage to control the lower rail of oscillation amplitude. By coupling the replica bias circuit to the lower rail, the lower rail of the oscillation amplitude follows the changes to the supply/control voltage.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 10, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Sameer Wadhwa
  • Patent number: 8742815
    Abstract: Temperature-independent delay elements and oscillators are disclosed. In one design, an apparatus includes at least one delay element, a bias circuit, and a current source. The delay element(s) receive a charging current from the current source and provide a delay that is dependent on the charging current. Each delay element may be a current-starved delay element. The delay element(s) may be coupled in series to implement a delay line or in a loop to implement an oscillator. The bias circuit controls generation of the charging current based on a function of at least one parameter (e.g., a switching threshold voltage) of the at least one delay element in order to reduce variations in delay with temperature. The current source provides the charging current for the delay element(s) and is controlled by the bias circuit.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: June 3, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Sameer Wadhwa, Marzio Pedrali-Noy
  • Publication number: 20130342256
    Abstract: Temperature-independent delay elements and oscillators are disclosed. In one design, an apparatus includes at least one delay element, a bias circuit, and a current source. The delay element(s) receive a charging current from the current source and provide a delay that is dependent on the charging current. Each delay element may be a current-starved delay element. The delay element(s) may be coupled in series to implement a delay line or in a loop to implement an oscillator. The bias circuit controls generation of the charging current based on a function of at least one parameter (e.g., a switching threshold voltage) of the at least one delay element in order to reduce variations in delay with temperature. The current source provides the charging current for the delay element(s) and is controlled by the bias circuit.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 26, 2013
    Inventors: Sameer Wadhwa, Marzio Pedrali-Noy
  • Patent number: 8570108
    Abstract: An injection-locked oscillator circuit includes a master oscillator, a slave oscillator, and an injection lock control circuit. The slave oscillator is decoupled from the master oscillator (for example, due to an unlock condition). When the slave is free running, its oscillating frequency is adjusted (for example, as a function of a supply voltage). After an amount of time, the slave is to be relocked to the master (for example, due the unlock condition no longer being present). The slave oscillating frequency is made to be slightly lower than the master oscillating frequency. The slave is then only recoupled to the master upon detection of an opposite-phase condition between the master oscillator output signal and the slave oscillator output signal. By only recoupling the slave to the master during opposite-phase conditions, frequency overshoots in the slave oscillating frequency are avoided that may otherwise occur were the recoupling done during in-phase conditions.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: October 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Ashwin Ragunathan, Marzio Pedrali-Noy, Sameer Wadhwa
  • Patent number: 8531172
    Abstract: Power efficient power supply regulator circuits are disclosed. The circuits are configured to modify their overhead current according to current load. This is particularly advantageous for use in display devices with widely varying current loads. Such displays include bi-stable displays, such as interferometric modulation displays, LCD displays, and DMD displays.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: September 10, 2013
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Sameer Wadhwa
  • Publication number: 20130229238
    Abstract: A wide frequency, low voltage oscillator includes multiple delay elements, in which each delay element includes two inverters coupled through a latching element into a differential-type configuration. Two current-source PMOS devices bias the latching element in a high-gain region at low-voltage. By coupling these current-source PMOS devices into the delay elements, the start-up voltage of the latching element is reduced. Each delay element is also biased using a replica bias circuit that scales the supply/control voltage of the oscillator and provides the scaled supply/control voltage to control the lower rail of oscillation amplitude. By coupling the replica bias circuit to the lower rail, the lower rail of the oscillation amplitude follows the changes to the supply/control voltage.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 5, 2013
    Applicant: QUALCOMM Incorporated
    Inventor: Sameer Wadhwa
  • Publication number: 20130106390
    Abstract: A curvature-compensated band-gap voltage reference circuit includes an operational amplifier and a high-frequency gain stage coupled to an output of the operational amplifier. The circuit also includes an electronic device and a matching circuit.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 2, 2013
    Applicant: QUALCOMM Incorporated
    Inventor: Sameer Wadhwa
  • Patent number: 8380138
    Abstract: Closed-loop techniques for adjusting the duty cycle of a cyclical signal, e.g., a clock signal, to approach a target value. In an exemplary embodiment, a charge pump is coupled to a charge and sample module, which drives a de-skew circuit in a negative feedback loop. The charge and sample module couples the charge pump to the integration capacitor during two of four successive phases, and also couples the integration capacitor to sampling capacitors during the other two of the four successive phases. The voltages across the sampling capacitors may be used to control the de-skew circuit, which adjusts the duty cycle of a cyclical signal to be adjusted.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: February 19, 2013
    Assignee: Qualcomm Incorporated
    Inventors: Sameer Wadhwa, Marzio Pedrali-Noy
  • Publication number: 20130033331
    Abstract: An injection-locked oscillator circuit includes a master oscillator, a slave oscillator, and an injection lock control circuit. The slave oscillator is decoupled from the master oscillator (for example, due to an unlock condition). When the slave is free running, its oscillating frequency is adjusted (for example, as a function of a supply voltage). After an amount of time, the slave is to be relocked to the master (for example, due the unlock condition no longer being present). The slave oscillating frequency is made to be slightly lower than the master oscillating frequency. The slave is then only recoupled to the master upon detection of an opposite-phase condition between the master oscillator output signal and the slave oscillator output signal. By only recoupling the slave to the master during opposite-phase conditions, frequency overshoots in the slave oscillating frequency are avoided that may otherwise occur were the recoupling done during in-phase conditions.
    Type: Application
    Filed: August 5, 2011
    Publication date: February 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Ashwin RAGHUNATHAN, Marzio Pedrali-Noy, Sameer Wadhwa