Abstract: An apparatus includes an input port, an output port, a common port, a first impedance matching network, a second impedance matching network, a first switch circuit, and a second switch circuit. The first impedance matching network may be coupled between the input port and the common port. The second impedance matching network may be coupled between the common port and the output port. The first switch circuit may be coupled between the input port and a circuit ground potential. The second switch circuit may be coupled between the output port and the circuit ground potential. The first and the second impedance matching networks are asymmetrical.

Abstract: An apparatus includes a switching circuit and a plurality of registers. The switching circuit may be configured to generate a plurality of control signals in response to an enable signal. One control signal at a time may be active while the enable signal is in a transfer state. The registers may be configured to (i) buffer a plurality of setting values received from a memory and (ii) present the setting values from a subset of the registers to a plurality of transceiver circuits while a corresponding control signal is active. The setting values may include a plurality of phase values and a plurality of gain values used in the transceiver circuits to steer a radio frequency beam. Each transceiver channel may update the setting values from the registers within a predetermined time after a corresponding control signal becomes active.