Abstract: A probe card analyzer mounts on a probe card in a wafer prober and a use a fixture in the wafer probe and switch electronics in place of an ATE head. Methods of testing can confirm that probe cards are operating within their specifications over large temperature ranges and the mechanical force ranges seen in real manufacturing environments. This reduces the cost and improves the accuracy and speed of analyzing probe cards and improves diagnosing problems with probe cards.

Abstract: Several embodiments of integrated circuit probe card assemblies are disclosed, which extend the mechanical compliance of both MEMS and thin-film fabricated probes, such that these types of spring probe structures can be used to test one or more integrated circuits on a semiconductor wafer. Several embodiments of probe card assemblies, which provide tight signal pad pitch compliance and/or enable high levels of parallel testing in commercial wafer probing equipment, are disclosed. In some preferred embodiments, the probe card assembly structures include separable standard components, which reduce assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form. The probes also have built in mechanical protection for both the integrated circuits and the MEMS or thin film fabricated spring tips and probe layout structures on substrates.

Abstract: An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Abstract: Probecard architectures partition the spring compliance required for IC testing between several different components. Such architectures can provide shorter springs, better impedance control, improved power/ground distribution and more direct paths to tester electronics. The probecards can also use thinner interconnector substrates to conform to the planarity of a DUT and may suspend such a substrate by wires attached to a perimeter edge of the substrate to permit the substrate to tilt. Tilting can also be facilitated by positioning tester-side springs away from the perimeter of the substrate. Low compliance MEMS probes for such architectures can be provided on replaceable coupons having attachment points away from electrical connections, and a method for fabricating probe springs can plate spring material on a membrane deformed by contact with a bumped substrate.

Abstract: An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Abstract: An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

Abstract: A probe card analyzer mounts on a probe card in a wafer prober and a use a fixture in the wafer probe and switch electronics in place of an ATE head. Methods of testing can confirm that probe cards are operating within their specifications over large temperature ranges and the mechanical force ranges seen in real manufacturing environments. This reduces the cost and improves the accuracy and speed of analyzing probe cards and improves diagnosing problems with probe cards.

Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes.

Abstract: An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

Abstract: Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.

Abstract: An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

Abstract: An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Abstract: Processes are described for building low compliance MEMS type C-spring probes in a coupon form that can be used as replaceable probes in probe card applications. The coupons have plated spring structures and a plated frame that holds a thin polyimide film in tension. The film keeps the probes and their tips of the top probes aligned to the pads of an IC being tested and the probes and tips of bottom probes aligned to the pads of a probe card high density interconnect that routes to an IC tester.

Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes.

Abstract: An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Abstract: Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes.

Abstract: An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

Abstract: Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.

Abstract: Probecard architectures partition the spring compliance required for IC testing between several different components. Such architectures can provide shorter springs, better impedance control, improved power/ground distribution and more direct paths to tester electronics. The probecards can also use thinner interconnector substrates to conform to the planarity of a DUT and may suspend such a substrate by wires attached to a perimeter edge of the substrate to permit the substrate to tilt. Tilting can also be facilitated by positioning tester-side springs away from the perimeter of the substrate. Low compliance MEMS probes for such architectures can be provided on replaceable coupons having attachment points away from electrical connections, and a method for fabricating probe springs can plate spring material on a membrane deformed by contact with a bumped substrate.

Abstract: Several embodiments of stress metal springs are disclosed, which typically comprise a plurality of stress metal layers that are established on a substrate, which are then controllably patterned and partially released from the substrate. An effective rotation angle is typically created in the formed stress metal springs, defining a looped spring structure. The formed springs provide high pitch compliant electrical contacts for a wide variety of interconnection systems, including chip scale semiconductor packages, high density interposer connectors, and probe contactors. Several embodiments of massively parallel interface integrated circuit test assemblies are also disclosed, comprising one or more substrates having stress metal spring contacts, to establish connections between one or more separated integrated circuits on a compliant wafer carrier.